(no commit message)

diff --git a/cole.mdwn b/cole.mdwn
index 537db130e35af287328ccc92be419f0da7f3f639..1eceb73926fee3b6825fe0f673e6c98cd2d2d5bb 100644 (file)
--- a/cole.mdwn
+++ b/cole.mdwn
@@ -30,14 +30,14 @@ move things along from one stage to the next
 
 ## Completed but not yet submitted
 
-- Convert hand-drawn 180nm Test ASIC's Memory Layout diagram into editable SVG <https://bugs.libre-soc.org/show_bug.cgi?id=401>
+- <https://bugs.libre-soc.org/show_bug.cgi?id=401> Convert 180nm Test ASIC Mem Layout diagram to SVG 
 
 - Coriolis2 documentation and setup scripts
-  <https://bugs.libre-soc.org/show_bug.cgi?id=291>
-  <https://bugs.libre-soc.org/show_bug.cgi?id=178>
-  <https://bugs.libre-soc.org/show_bug.cgi?id=320>
-  <https://bugs.libre-soc.org/show_bug.cgi?id=404>
-  <https://bugs.libre-soc.org/show_bug.cgi?id=138> 
+  - <https://bugs.libre-soc.org/show_bug.cgi?id=291>
+  - <https://bugs.libre-soc.org/show_bug.cgi?id=178>
+  - <https://bugs.libre-soc.org/show_bug.cgi?id=320>
+  - <https://bugs.libre-soc.org/show_bug.cgi?id=404>
+  - <https://bugs.libre-soc.org/show_bug.cgi?id=138> 
 
 ## Submitted for NLNet RFP