ac: only set ac_dlc in ac_llvm_build.c

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index d009c3b0946b8bf842d4faa2e1faa01178a5d420..b22c95c7a80e722bcf0c52ecb570ef642e118213 100644 (file)
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -2603,6 +2603,10 @@ LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx,
                      a->opcode == ac_image_get_lod;
        bool atomic = a->opcode == ac_image_atomic ||
                      a->opcode == ac_image_atomic_cmpswap;
+       bool load = a->opcode == ac_image_sample ||
+                   a->opcode == ac_image_gather4 ||
+                   a->opcode == ac_image_load ||
+                   a->opcode == ac_image_load_mip;
        LLVMTypeRef coord_type = sample ? ctx->f32 : ctx->i32;
 
        if (atomic || a->opcode == ac_image_store || a->opcode == ac_image_store_mip) {
@@ -2643,7 +2647,9 @@ LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx,
        }
 
        args[num_args++] = ctx->i32_0; /* texfailctrl */
-       args[num_args++] = LLVMConstInt(ctx->i32, a->cache_policy, false);
+       args[num_args++] = LLVMConstInt(ctx->i32,
+                                       load ? get_load_cache_policy(ctx, a->cache_policy) :
+                                              a->cache_policy, false);
 
        const char *name;
        const char *atomic_subop = "";

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index a92c076497dc45fa22b40a838633c85cd3a2e620..57daf2a52aab054888564107040e3fe4a534cb85 100644 (file)
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -1519,7 +1519,6 @@ static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueR
 
 static unsigned get_cache_policy(struct ac_nir_context *ctx,
                                 enum gl_access_qualifier access,
-                                bool load,
                                 bool may_store_unaligned,
                                 bool writeonly_memory)
 {
@@ -1536,8 +1535,7 @@ static unsigned get_cache_policy(struct ac_nir_context *ctx,
              */
             writeonly_memory ||
             access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
-               cache_policy |= ac_glc |
-                               (ctx->ac.chip_class >= GFX10 && load ? ac_dlc : 0);
+               cache_policy |= ac_glc;
        }
 
        return cache_policy;
@@ -1551,7 +1549,7 @@ static void visit_store_ssbo(struct ac_nir_context *ctx,
        unsigned writemask = nir_intrinsic_write_mask(instr);
        enum gl_access_qualifier access = nir_intrinsic_access(instr);
        bool writeonly_memory = access & ACCESS_NON_READABLE;
-       unsigned cache_policy = get_cache_policy(ctx, access, false, false, writeonly_memory);
+       unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
 
        LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
                                        get_src(ctx, instr->src[1]), true);
@@ -1714,7 +1712,7 @@ static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
        int elem_size_bytes = instr->dest.ssa.bit_size / 8;
        int num_components = instr->num_components;
        enum gl_access_qualifier access = nir_intrinsic_access(instr);
-       unsigned cache_policy = get_cache_policy(ctx, access, true, false, false);
+       unsigned cache_policy = get_cache_policy(ctx, access, false, false);
 
        LLVMValueRef offset = get_src(ctx, instr->src[1]);
        LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
@@ -2452,7 +2450,7 @@ static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
 
        struct ac_image_args args = {};
 
-       args.cache_policy = get_cache_policy(ctx, access, true, false, false);
+       args.cache_policy = get_cache_policy(ctx, access, false, false);
 
        if (dim == GLSL_SAMPLER_DIM_BUF) {
                unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
@@ -2510,7 +2508,7 @@ static void visit_image_store(struct ac_nir_context *ctx,
        bool writeonly_memory = access & ACCESS_NON_READABLE;
        struct ac_image_args args = {};
 
-       args.cache_policy = get_cache_policy(ctx, access, false, true, writeonly_memory);
+       args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
 
        if (dim == GLSL_SAMPLER_DIM_BUF) {
                LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);

diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
index e937ad8f3aa161629e720b066749f9054d49643c..d45dac1553f58d9f168d04a340754a39e6285bd1 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
@@ -315,7 +315,7 @@ static void image_fetch_coords(
 
 static unsigned get_cache_policy(struct si_shader_context *ctx,
                                 const struct tgsi_full_instruction *inst,
-                                bool load, bool atomic, bool may_store_unaligned,
+                                bool atomic, bool may_store_unaligned,
                                 bool writeonly_memory)
 {
        unsigned cache_policy = 0;
@@ -331,8 +331,7 @@ static unsigned get_cache_policy(struct si_shader_context *ctx,
              * instructions. */
             writeonly_memory ||
             inst->Memory.Qualifier & (TGSI_MEMORY_COHERENT | TGSI_MEMORY_VOLATILE))) {
-               cache_policy |= ac_glc |
-                               (ctx->screen->info.chip_class >= GFX10 && load ? ac_dlc : 0);
+               cache_policy |= ac_glc;
        }
 
        if (inst->Memory.Qualifier & TGSI_MEMORY_STREAM_CACHE_POLICY)
@@ -532,7 +531,7 @@ static void load_emit(
                                                info->uses_bindless_buffer_atomic,
                                                info->uses_bindless_image_store |
                                                info->uses_bindless_image_atomic);
-       args.cache_policy = get_cache_policy(ctx, inst, true, false, false, false);
+       args.cache_policy = get_cache_policy(ctx, inst, false, false, false);
 
        if (inst->Src[0].Register.File == TGSI_FILE_BUFFER) {
                /* Don't use SMEM for shader buffer loads, because LLVM doesn't
@@ -709,7 +708,6 @@ static void store_emit(
 
        bool is_image = inst->Dst[0].Register.File != TGSI_FILE_BUFFER;
        args.cache_policy = get_cache_policy(ctx, inst,
-                                            false, /* load */
                                             false, /* atomic */
                                             is_image, /* may_store_unaligned */
                                             writeonly_memory);
@@ -831,7 +829,7 @@ static void atomic_emit(
 
        args.data[num_data++] =
                ac_to_integer(&ctx->ac, lp_build_emit_fetch(bld_base, inst, 2, 0));
-       args.cache_policy = get_cache_policy(ctx, inst, false, true, false, false);
+       args.cache_policy = get_cache_policy(ctx, inst, true, false, false);
 
        if (inst->Src[0].Register.File == TGSI_FILE_BUFFER) {
                args.resource = shader_buffer_fetch_rsrc(ctx, &inst->Src[0], false);