cpu/

	* m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
	(f-dsp-40-u20, f-dsp-40-u24): Ditto.
	opcodes/
	* cgen-ibld.in: #include "cgen/basic-modes.h".
	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	* xstormy16-ibld.c: Regenerate.

diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index 573430fae60e4dd44f6a7ed2f9d301ff0885cc2e..f2dcc519b5f1a4b69962883d9a89fe38de261410 100644 (file)
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,8 @@
+2010-01-05  Doug Evans  <dje@sebabeach.org>
+
+       * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
+       (f-dsp-40-u20, f-dsp-40-u24): Ditto.
+
 2010-01-02  Doug Evans  <dje@sebabeach.org>
 
        * m32c.opc (parse_signed16): Fix typo.

diff --git a/cpu/m32c.cpu b/cpu/m32c.cpu
index 127da499ef2ed93028ff64fb45e06a57e472b3f8..28d6ea5685251758b6ffd505c1d7f2fcf87fb1f3 100644 (file)
--- a/cpu/m32c.cpu
+++ b/cpu/m32c.cpu
@@ -617,12 +617,12 @@
                     (or USI
                         (and (srl value 16) #x0000ff)
                         (and value          #x00ff00))
-                    (and (sll value 16) #xff0000))) ; insert
+                    (and (sll value 16)     #xff0000))) ; insert
      ((value pc) (or USI
                     (or USI
-                        (and USI (srl UHI value 16) #x0000ff)
-                        (and USI value              #x00ff00))
-                    (and USI (sll UHI value 16) #xff0000))) ; extract
+                        (and USI (srl value 16) #x0000ff)
+                        (and USI value          #x00ff00))
+                    (and USI (sll value 16)     #xff0000))) ; extract
 )
 
 (df f-dsp-40-u20 "20 bit unsigned" (all-isas) 40 20 UINT
@@ -630,24 +630,25 @@
                     (or USI
                         (and (srl value 16) #x0000ff)
                         (and value          #x00ff00))
-                    (and (sll value 16) #x0f0000))) ; insert
+                    (and (sll value 16)     #x0f0000))) ; insert
      ((value pc) (or USI
                     (or USI
-                        (and USI (srl UHI value 16) #x0000ff)
-                        (and USI value              #x00ff00))
-                    (and USI (sll UHI value 16) #x0f0000))) ; extract
+                        (and USI (srl value 16) #x0000ff)
+                        (and USI value          #x00ff00))
+                    (and USI (sll value 16)     #x0f0000))) ; extract
 )
+
 (df f-dsp-40-u24 "24 bit unsigned" (all-isas) 40 24 UINT
      ((value pc) (or USI
                     (or USI
                         (and (srl value 16) #x0000ff)
                         (and value          #x00ff00))
-                    (and (sll value 16) #xff0000))) ; insert
+                    (and (sll value 16)     #xff0000))) ; insert
      ((value pc) (or USI
                     (or USI
-                        (and USI (srl UHI value 16) #x0000ff)
-                        (and USI value              #x00ff00))
-                    (and USI (sll UHI value 16) #xff0000))) ; extract
+                        (and USI (srl value 16) #x0000ff)
+                        (and USI value          #x00ff00))
+                    (and USI (sll value 16)     #xff0000))) ; extract
 )
 
 (dnmf f-dsp-40-s32 "32 bit signed" (all-isas) INT

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index ff82bdd5802c8da26e0971e11995499d2e54145e..57042a5463e1080d62f50223284b111cac038b47 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,11 @@
+2010-01-05  Doug Evans  <dje@sebabeach.org>
+
+       * cgen-ibld.in: #include "cgen/basic-modes.h".
+       * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
+       * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
+       * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
+       * xstormy16-ibld.c: Regenerate.
+
 2010-01-04  Nick Clifton  <nickc@redhat.com>
 
        PR 11123

diff --git a/opcodes/cgen-ibld.in b/opcodes/cgen-ibld.in
index 3a88b3cefd1aacacd8fff286df17d9bea56b8709..ea12908149c4290e7c09228e8e382aa9a0eeb123 100644 (file)
--- a/opcodes/cgen-ibld.in
+++ b/opcodes/cgen-ibld.in
@@ -33,6 +33,7 @@
 #include "symcat.h"
 #include "@prefix@-desc.h"
 #include "@prefix@-opc.h"
+#include "cgen/basic-modes.h"
 #include "opintl.h"
 #include "safe-ctype.h"
 

diff --git a/opcodes/fr30-ibld.c b/opcodes/fr30-ibld.c
index 0607331fece3ba555fc093838020e9f1d621b097..077f0ac69f0de4554e6dde4f8b304911a5593ee1 100644 (file)
--- a/opcodes/fr30-ibld.c
+++ b/opcodes/fr30-ibld.c
@@ -33,6 +33,7 @@
 #include "symcat.h"
 #include "fr30-desc.h"
 #include "fr30-opc.h"
+#include "cgen/basic-modes.h"
 #include "opintl.h"
 #include "safe-ctype.h"
 
@@ -604,7 +605,7 @@ fr30_cgen_insert_operand (CGEN_CPU_DESC cd,
     case FR30_OPERAND_DIR10 :
       {
         long value = fields->f_dir10;
-        value = ((unsigned int) (value) >> (2));
+        value = ((USI) (value) >> (2));
         errmsg = insert_normal (cd, value, 0, 0, 8, 8, 16, total_length, buffer);
       }
       break;
@@ -614,14 +615,14 @@ fr30_cgen_insert_operand (CGEN_CPU_DESC cd,
     case FR30_OPERAND_DIR9 :
       {
         long value = fields->f_dir9;
-        value = ((unsigned int) (value) >> (1));
+        value = ((USI) (value) >> (1));
         errmsg = insert_normal (cd, value, 0, 0, 8, 8, 16, total_length, buffer);
       }
       break;
     case FR30_OPERAND_DISP10 :
       {
         long value = fields->f_disp10;
-        value = ((int) (value) >> (2));
+        value = ((SI) (value) >> (2));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, buffer);
       }
       break;
@@ -631,14 +632,14 @@ fr30_cgen_insert_operand (CGEN_CPU_DESC cd,
     case FR30_OPERAND_DISP9 :
       {
         long value = fields->f_disp9;
-        value = ((int) (value) >> (1));
+        value = ((SI) (value) >> (1));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 4, 8, 16, total_length, buffer);
       }
       break;
     case FR30_OPERAND_I20 :
       {
 {
-  FLD (f_i20_4) = ((unsigned int) (FLD (f_i20)) >> (16));
+  FLD (f_i20_4) = ((UINT) (FLD (f_i20)) >> (16));
   FLD (f_i20_16) = ((FLD (f_i20)) & (65535));
 }
         errmsg = insert_normal (cd, fields->f_i20_4, 0, 0, 8, 4, 16, total_length, buffer);
@@ -658,14 +659,14 @@ fr30_cgen_insert_operand (CGEN_CPU_DESC cd,
     case FR30_OPERAND_LABEL12 :
       {
         long value = fields->f_rel12;
-        value = ((int) (((value) - (((pc) + (2))))) >> (1));
+        value = ((SI) (((value) - (((pc) + (2))))) >> (1));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 11, 16, total_length, buffer);
       }
       break;
     case FR30_OPERAND_LABEL9 :
       {
         long value = fields->f_rel9;
-        value = ((int) (((value) - (((pc) + (2))))) >> (1));
+        value = ((SI) (((value) - (((pc) + (2))))) >> (1));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 16, total_length, buffer);
       }
       break;
@@ -693,14 +694,14 @@ fr30_cgen_insert_operand (CGEN_CPU_DESC cd,
     case FR30_OPERAND_S10 :
       {
         long value = fields->f_s10;
-        value = ((int) (value) >> (2));
+        value = ((SI) (value) >> (2));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 16, total_length, buffer);
       }
       break;
     case FR30_OPERAND_U10 :
       {
         long value = fields->f_u10;
-        value = ((unsigned int) (value) >> (2));
+        value = ((USI) (value) >> (2));
         errmsg = insert_normal (cd, value, 0, 0, 8, 8, 16, total_length, buffer);
       }
       break;
@@ -716,7 +717,7 @@ fr30_cgen_insert_operand (CGEN_CPU_DESC cd,
     case FR30_OPERAND_UDISP6 :
       {
         long value = fields->f_udisp6;
-        value = ((unsigned int) (value) >> (2));
+        value = ((USI) (value) >> (2));
         errmsg = insert_normal (cd, value, 0, 0, 8, 4, 16, total_length, buffer);
       }
       break;

diff --git a/opcodes/frv-ibld.c b/opcodes/frv-ibld.c
index 07e5ce0fd685570d19126f1f8d4cb54ca0315726..d628fd425cb675bda4744607bcfa802f6d4d701f 100644 (file)
--- a/opcodes/frv-ibld.c
+++ b/opcodes/frv-ibld.c
@@ -33,6 +33,7 @@
 #include "symcat.h"
 #include "frv-desc.h"
 #include "frv-opc.h"
+#include "cgen/basic-modes.h"
 #include "opintl.h"
 #include "safe-ctype.h"
 
@@ -755,15 +756,15 @@ frv_cgen_insert_operand (CGEN_CPU_DESC cd,
     case FRV_OPERAND_LABEL16 :
       {
         long value = fields->f_label16;
-        value = ((int) (((value) - (pc))) >> (2));
+        value = ((SI) (((value) - (pc))) >> (2));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, buffer);
       }
       break;
     case FRV_OPERAND_LABEL24 :
       {
 {
-  FLD (f_labelH6) = ((int) (((FLD (f_label24)) - (pc))) >> (20));
-  FLD (f_labelL18) = ((((unsigned int) (((FLD (f_label24)) - (pc))) >> (2))) & (262143));
+  FLD (f_labelH6) = ((SI) (((FLD (f_label24)) - (pc))) >> (20));
+  FLD (f_labelL18) = ((((UINT) (((FLD (f_label24)) - (pc))) >> (2))) & (262143));
 }
         errmsg = insert_normal (cd, fields->f_labelH6, 0|(1<<CGEN_IFLD_SIGNED), 0, 30, 6, 32, total_length, buffer);
         if (errmsg)
@@ -809,7 +810,7 @@ frv_cgen_insert_operand (CGEN_CPU_DESC cd,
     case FRV_OPERAND_SPR :
       {
 {
-  FLD (f_spr_h) = ((unsigned int) (FLD (f_spr)) >> (6));
+  FLD (f_spr_h) = ((UINT) (FLD (f_spr)) >> (6));
   FLD (f_spr_l) = ((FLD (f_spr)) & (63));
 }
         errmsg = insert_normal (cd, fields->f_spr_h, 0, 0, 30, 6, 32, total_length, buffer);
@@ -823,7 +824,7 @@ frv_cgen_insert_operand (CGEN_CPU_DESC cd,
     case FRV_OPERAND_U12 :
       {
 {
-  FLD (f_u12_h) = ((int) (FLD (f_u12)) >> (6));
+  FLD (f_u12_h) = ((SI) (FLD (f_u12)) >> (6));
   FLD (f_u12_l) = ((FLD (f_u12)) & (63));
 }
         errmsg = insert_normal (cd, fields->f_u12_h, 0|(1<<CGEN_IFLD_SIGNED), 0, 17, 6, 32, total_length, buffer);

diff --git a/opcodes/ip2k-ibld.c b/opcodes/ip2k-ibld.c
index a1929a3f2b62800e79877aea61ea31118f9a4411..dcc9c9a39c4986021791f4e2e27f6448a1082a4a 100644 (file)
--- a/opcodes/ip2k-ibld.c
+++ b/opcodes/ip2k-ibld.c
@@ -33,6 +33,7 @@
 #include "symcat.h"
 #include "ip2k-desc.h"
 #include "ip2k-opc.h"
+#include "cgen/basic-modes.h"
 #include "opintl.h"
 #include "safe-ctype.h"
 

diff --git a/opcodes/iq2000-ibld.c b/opcodes/iq2000-ibld.c
index a2c2de1ffaf3c18e50c4a6853afe3a1abb89fe2b..c6fa653b6ebed3a8f05378344005b12b096f2248 100644 (file)
--- a/opcodes/iq2000-ibld.c
+++ b/opcodes/iq2000-ibld.c
@@ -33,6 +33,7 @@
 #include "symcat.h"
 #include "iq2000-desc.h"
 #include "iq2000-opc.h"
+#include "cgen/basic-modes.h"
 #include "opintl.h"
 #include "safe-ctype.h"
 
@@ -613,14 +614,14 @@ iq2000_cgen_insert_operand (CGEN_CPU_DESC cd,
     case IQ2000_OPERAND_JMPTARG :
       {
         long value = fields->f_jtarg;
-        value = ((unsigned int) (((value) & (262143))) >> (2));
+        value = ((USI) (((value) & (262143))) >> (2));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 15, 16, 32, total_length, buffer);
       }
       break;
     case IQ2000_OPERAND_JMPTARGQ10 :
       {
         long value = fields->f_jtargq10;
-        value = ((unsigned int) (((value) & (8388607))) >> (2));
+        value = ((USI) (((value) & (8388607))) >> (2));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 20, 21, 32, total_length, buffer);
       }
       break;
@@ -645,7 +646,7 @@ iq2000_cgen_insert_operand (CGEN_CPU_DESC cd,
     case IQ2000_OPERAND_OFFSET :
       {
         long value = fields->f_offset;
-        value = ((int) (((value) - (pc))) >> (2));
+        value = ((SI) (((value) - (pc))) >> (2));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, buffer);
       }
       break;

diff --git a/opcodes/lm32-ibld.c b/opcodes/lm32-ibld.c
index d3e4e6f31a4f7d70055ac7d8204d4261bf5bb99e..c9f82297012bda9adf78d93f610faf3c36d77af8 100644 (file)
--- a/opcodes/lm32-ibld.c
+++ b/opcodes/lm32-ibld.c
@@ -33,6 +33,7 @@
 #include "symcat.h"
 #include "lm32-desc.h"
 #include "lm32-opc.h"
+#include "cgen/basic-modes.h"
 #include "opintl.h"
 #include "safe-ctype.h"
 
@@ -568,14 +569,14 @@ lm32_cgen_insert_operand (CGEN_CPU_DESC cd,
     case LM32_OPERAND_BRANCH :
       {
         long value = fields->f_branch;
-        value = ((int) (((value) - (pc))) >> (2));
+        value = ((SI) (((value) - (pc))) >> (2));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, buffer);
       }
       break;
     case LM32_OPERAND_CALL :
       {
         long value = fields->f_call;
-        value = ((int) (((value) - (pc))) >> (2));
+        value = ((SI) (((value) - (pc))) >> (2));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, buffer);
       }
       break;
@@ -671,7 +672,7 @@ lm32_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 16, 32, total_length, pc, & value);
-        value = ((pc) + (((int) (((value) << (16))) >> (14))));
+        value = ((pc) + (((SI) (((value) << (16))) >> (14))));
         fields->f_branch = value;
       }
       break;
@@ -679,7 +680,7 @@ lm32_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, pc, & value);
-        value = ((pc) + (((int) (((value) << (6))) >> (4))));
+        value = ((pc) + (((SI) (((value) << (6))) >> (4))));
         fields->f_call = value;
       }
       break;

diff --git a/opcodes/m32c-ibld.c b/opcodes/m32c-ibld.c
index 1024e05efbcd4358941dd2ad2f78389a99458750..4d201c6bd477f6419fc35119455fc44f7e36a799 100644 (file)
--- a/opcodes/m32c-ibld.c
+++ b/opcodes/m32c-ibld.c
@@ -33,6 +33,7 @@
 #include "symcat.h"
 #include "m32c-desc.h"
 #include "m32c-opc.h"
+#include "cgen/basic-modes.h"
 #include "opintl.h"
 #include "safe-ctype.h"
 
@@ -582,7 +583,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
-  FLD (f_2_2) = ((((unsigned int) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
+  FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
 }
         errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
         if (errmsg)
@@ -601,14 +602,14 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_BIT32RNPREFIXED :
       {
         long value = fields->f_dst32_rn_prefixed_QI;
-        value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
+        value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
         errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
       }
       break;
     case M32C_OPERAND_BIT32RNUNPREFIXED :
       {
         long value = fields->f_dst32_rn_unprefixed_QI;
-        value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
+        value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
         errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
       }
       break;
@@ -618,7 +619,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_BITBASE16_16_U16 :
       {
         long value = fields->f_dsp_16_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
       }
       break;
@@ -629,7 +630,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7));
-  FLD (f_dsp_8_u8) = ((((unsigned int) (FLD (f_bitbase16_u11_S)) >> (3))) & (255));
+  FLD (f_dsp_8_u8) = ((((UINT) (FLD (f_bitbase16_u11_S)) >> (3))) & (255));
 }
         errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer);
         if (errmsg)
@@ -643,7 +644,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7));
-  FLD (f_dsp_16_s8) = ((int) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3));
+  FLD (f_dsp_16_s8) = ((INT) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3));
 }
         errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
         if (errmsg)
@@ -657,14 +658,14 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7));
-  FLD (f_dsp_16_s16) = ((int) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3));
+  FLD (f_dsp_16_s16) = ((INT) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3));
 }
         errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
         if (errmsg)
           break;
         {
         long value = fields->f_dsp_16_s16;
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
       }
         if (errmsg)
@@ -675,7 +676,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7));
-  FLD (f_dsp_16_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255));
+  FLD (f_dsp_16_u8) = ((((UINT) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255));
 }
         errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
         if (errmsg)
@@ -689,14 +690,14 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7));
-  FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535));
+  FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535));
 }
         errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
         if (errmsg)
           break;
         {
         long value = fields->f_dsp_16_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
       }
         if (errmsg)
@@ -707,15 +708,15 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7));
-  FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535));
-  FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255));
+  FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535));
+  FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255));
 }
         errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
         if (errmsg)
           break;
         {
         long value = fields->f_dsp_16_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
       }
         if (errmsg)
@@ -729,7 +730,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7));
-  FLD (f_dsp_24_s8) = ((int) (FLD (f_bitbase32_24_s11_prefixed)) >> (3));
+  FLD (f_dsp_24_s8) = ((INT) (FLD (f_bitbase32_24_s11_prefixed)) >> (3));
 }
         errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
         if (errmsg)
@@ -743,8 +744,8 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7));
-  FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255));
-  FLD (f_dsp_32_s8) = ((int) (FLD (f_bitbase32_24_s19_prefixed)) >> (11));
+  FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255));
+  FLD (f_dsp_32_s8) = ((INT) (FLD (f_bitbase32_24_s19_prefixed)) >> (11));
 }
         errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
         if (errmsg)
@@ -761,7 +762,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7));
-  FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255));
+  FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255));
 }
         errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
         if (errmsg)
@@ -775,8 +776,8 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7));
-  FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255));
-  FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255));
+  FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255));
+  FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255));
 }
         errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
         if (errmsg)
@@ -793,8 +794,8 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7));
-  FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255));
-  FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535));
+  FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255));
+  FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535));
 }
         errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
         if (errmsg)
@@ -804,7 +805,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
           break;
         {
         long value = fields->f_dsp_32_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
       }
         if (errmsg)
@@ -826,7 +827,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_DSP_16_S16 :
       {
         long value = fields->f_dsp_16_s16;
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
       }
       break;
@@ -836,7 +837,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_DSP_16_U16 :
       {
         long value = fields->f_dsp_16_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
       }
       break;
@@ -844,11 +845,11 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
-  FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255));
+  FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255));
 }
         {
         long value = fields->f_dsp_16_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
       }
         if (errmsg)
@@ -862,11 +863,11 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
-  FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255));
+  FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_16_u24)) >> (16))) & (255));
 }
         {
         long value = fields->f_dsp_16_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
       }
         if (errmsg)
@@ -883,7 +884,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
-  FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255));
+  FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255));
 }
         errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
         if (errmsg)
@@ -900,7 +901,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255));
-  FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_u16)) >> (8))) & (255));
+  FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_u16)) >> (8))) & (255));
 }
         errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
         if (errmsg)
@@ -914,14 +915,14 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
-  FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
+  FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
 }
         errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
         if (errmsg)
           break;
         {
         long value = fields->f_dsp_32_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
       }
         if (errmsg)
@@ -932,14 +933,14 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
-  FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
+  FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
 }
         errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
         if (errmsg)
           break;
         {
         long value = fields->f_dsp_32_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
       }
         if (errmsg)
@@ -952,7 +953,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_DSP_32_S16 :
       {
         long value = fields->f_dsp_32_s16;
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
       }
       break;
@@ -962,21 +963,21 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_DSP_32_U16 :
       {
         long value = fields->f_dsp_32_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
       }
       break;
     case M32C_OPERAND_DSP_32_U20 :
       {
         long value = fields->f_dsp_32_u24;
-        value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
+        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
         errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
       }
       break;
     case M32C_OPERAND_DSP_32_U24 :
       {
         long value = fields->f_dsp_32_u24;
-        value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
+        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
         errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
       }
       break;
@@ -986,7 +987,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_DSP_40_S16 :
       {
         long value = fields->f_dsp_40_s16;
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
       }
       break;
@@ -996,21 +997,21 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_DSP_40_U16 :
       {
         long value = fields->f_dsp_40_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer);
       }
       break;
     case M32C_OPERAND_DSP_40_U20 :
       {
         long value = fields->f_dsp_40_u20;
-        value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
+        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
         errmsg = insert_normal (cd, value, 0, 32, 8, 20, 32, total_length, buffer);
       }
       break;
     case M32C_OPERAND_DSP_40_U24 :
       {
         long value = fields->f_dsp_40_u24;
-        value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
+        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
         errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
       }
       break;
@@ -1020,7 +1021,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_DSP_48_S16 :
       {
         long value = fields->f_dsp_48_s16;
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
       }
       break;
@@ -1030,19 +1031,19 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_DSP_48_U16 :
       {
         long value = fields->f_dsp_48_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
       }
       break;
     case M32C_OPERAND_DSP_48_U20 :
       {
 {
-  FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_48_u20)) >> (16))) & (15));
+  FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u20)) >> (16))) & (15));
   FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u20)) & (65535));
 }
         {
         long value = fields->f_dsp_48_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
       }
         if (errmsg)
@@ -1055,12 +1056,12 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_DSP_48_U24 :
       {
 {
-  FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_48_u24)) >> (16))) & (255));
+  FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_48_u24)) >> (16))) & (255));
   FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535));
 }
         {
         long value = fields->f_dsp_48_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
       }
         if (errmsg)
@@ -1076,7 +1077,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_DSP_8_S24 :
       {
         long value = fields->f_dsp_8_s24;
-        value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
+        value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, buffer);
       }
       break;
@@ -1086,14 +1087,14 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_DSP_8_U16 :
       {
         long value = fields->f_dsp_8_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer);
       }
       break;
     case M32C_OPERAND_DSP_8_U24 :
       {
         long value = fields->f_dsp_8_u24;
-        value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
+        value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
         errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer);
       }
       break;
@@ -1183,7 +1184,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_DST32RNPREFIXEDQI :
       {
         long value = fields->f_dst32_rn_prefixed_QI;
-        value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
+        value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
         errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
       }
       break;
@@ -1204,7 +1205,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_DST32RNUNPREFIXEDQI :
       {
         long value = fields->f_dst32_rn_unprefixed_QI;
-        value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
+        value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
         errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
       }
       break;
@@ -1229,7 +1230,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_IMM_16_HI :
       {
         long value = fields->f_dsp_16_s16;
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
       }
       break;
@@ -1239,19 +1240,19 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_IMM_16_SI :
       {
 {
-  FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_16_s32)) >> (16))) & (65535));
+  FLD (f_dsp_32_u16) = ((((UINT) (FLD (f_dsp_16_s32)) >> (16))) & (65535));
   FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535));
 }
         {
         long value = fields->f_dsp_16_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
       }
         if (errmsg)
           break;
         {
         long value = fields->f_dsp_32_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
       }
         if (errmsg)
@@ -1265,7 +1266,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
-  FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255));
+  FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_dsp_24_s16)) >> (8))) & (255));
 }
         errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
         if (errmsg)
@@ -1281,7 +1282,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_IMM_24_SI :
       {
 {
-  FLD (f_dsp_32_u24) = ((((unsigned int) (FLD (f_dsp_24_s32)) >> (8))) & (16777215));
+  FLD (f_dsp_32_u24) = ((((UINT) (FLD (f_dsp_24_s32)) >> (8))) & (16777215));
   FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255));
 }
         errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
@@ -1289,7 +1290,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
           break;
         {
         long value = fields->f_dsp_32_u24;
-        value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
+        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
         errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
       }
         if (errmsg)
@@ -1299,7 +1300,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_IMM_32_HI :
       {
         long value = fields->f_dsp_32_s16;
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
       }
       break;
@@ -1309,14 +1310,14 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_IMM_32_SI :
       {
         long value = fields->f_dsp_32_s32;
-        value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
+        value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer);
       }
       break;
     case M32C_OPERAND_IMM_40_HI :
       {
         long value = fields->f_dsp_40_s16;
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
       }
       break;
@@ -1326,12 +1327,12 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_IMM_40_SI :
       {
 {
-  FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_40_s32)) >> (24))) & (255));
+  FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_40_s32)) >> (24))) & (255));
   FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215));
 }
         {
         long value = fields->f_dsp_40_u24;
-        value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
+        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
         errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
       }
         if (errmsg)
@@ -1344,7 +1345,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_IMM_48_HI :
       {
         long value = fields->f_dsp_48_s16;
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
       }
       break;
@@ -1354,19 +1355,19 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_IMM_48_SI :
       {
 {
-  FLD (f_dsp_64_u16) = ((((unsigned int) (FLD (f_dsp_48_s32)) >> (16))) & (65535));
+  FLD (f_dsp_64_u16) = ((((UINT) (FLD (f_dsp_48_s32)) >> (16))) & (65535));
   FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535));
 }
         {
         long value = fields->f_dsp_48_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
       }
         if (errmsg)
           break;
         {
         long value = fields->f_dsp_64_u16;
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer);
       }
         if (errmsg)
@@ -1377,7 +1378,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255));
-  FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_56_s16)) >> (8))) & (255));
+  FLD (f_dsp_64_u8) = ((((UINT) (FLD (f_dsp_56_s16)) >> (8))) & (255));
 }
         errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer);
         if (errmsg)
@@ -1393,14 +1394,14 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_IMM_64_HI :
       {
         long value = fields->f_dsp_64_s16;
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer);
       }
       break;
     case M32C_OPERAND_IMM_8_HI :
       {
         long value = fields->f_dsp_8_s16;
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer);
       }
       break;
@@ -1433,7 +1434,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
-  FLD (f_2_2) = ((((unsigned int) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
+  FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
 }
         errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
         if (errmsg)
@@ -1481,14 +1482,14 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_LAB_8_16 :
       {
         long value = fields->f_lab_8_16;
-        value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((unsigned int) (((((value) - (((pc) + (1))))) & (65535))) >> (8))));
+        value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((USI) (((((value) - (((pc) + (1))))) & (65535))) >> (8))));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer);
       }
       break;
     case M32C_OPERAND_LAB_8_24 :
       {
         long value = fields->f_lab_8_24;
-        value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
+        value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer);
       }
       break;
@@ -1505,7 +1506,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
   SI tmp_val;
   tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2));
   FLD (f_7_1) = ((tmp_val) & (1));
-  FLD (f_2_2) = ((unsigned int) (tmp_val) >> (1));
+  FLD (f_2_2) = ((USI) (tmp_val) >> (1));
 }
         errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
         if (errmsg)
@@ -1595,7 +1596,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_SRC32RNPREFIXEDQI :
       {
         long value = fields->f_src32_rn_prefixed_QI;
-        value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
+        value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
         errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
       }
       break;
@@ -1616,7 +1617,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
       {
         long value = fields->f_src32_rn_unprefixed_QI;
-        value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
+        value = (((((((~ (value))) << (1))) & (2))) | (((((USI) (value) >> (1))) & (1))));
         errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
       }
       break;
@@ -1655,7 +1656,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_COND32 :
       {
 {
-  FLD (f_9_1) = ((((unsigned int) (FLD (f_cond32)) >> (3))) & (1));
+  FLD (f_9_1) = ((((UINT) (FLD (f_cond32)) >> (3))) & (1));
   FLD (f_13_3) = ((FLD (f_cond32)) & (7));
 }
         errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer);
@@ -1681,7 +1682,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32C_OPERAND_COND32J :
       {
 {
-  FLD (f_1_3) = ((((unsigned int) (FLD (f_cond32j)) >> (1))) & (7));
+  FLD (f_1_3) = ((((UINT) (FLD (f_cond32j)) >> (1))) & (7));
   FLD (f_7_1) = ((FLD (f_cond32j)) & (1));
 }
         errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer);
@@ -1798,7 +1799,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
-        value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
+        value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
         fields->f_dst32_rn_prefixed_QI = value;
       }
       break;
@@ -1806,7 +1807,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
-        value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
+        value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
         fields->f_dst32_rn_unprefixed_QI = value;
       }
       break;
@@ -1817,7 +1818,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_16_u16 = value;
       }
       break;
@@ -1853,7 +1854,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
         {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         fields->f_dsp_16_s16 = value;
       }
         if (length <= 0) break;
@@ -1880,7 +1881,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
         {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_16_u16 = value;
       }
         if (length <= 0) break;
@@ -1896,7 +1897,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
         {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_16_u16 = value;
       }
         if (length <= 0) break;
@@ -1964,7 +1965,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
         {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_32_u16 = value;
       }
         if (length <= 0) break;
@@ -1989,7 +1990,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         fields->f_dsp_16_s16 = value;
       }
       break;
@@ -2000,7 +2001,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_16_u16 = value;
       }
       break;
@@ -2009,7 +2010,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
         {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_16_u16 = value;
       }
         if (length <= 0) break;
@@ -2025,7 +2026,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
         {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_16_u16 = value;
       }
         if (length <= 0) break;
@@ -2071,7 +2072,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
         {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_32_u16 = value;
       }
         if (length <= 0) break;
@@ -2087,7 +2088,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
         {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_32_u16 = value;
       }
         if (length <= 0) break;
@@ -2103,7 +2104,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         fields->f_dsp_32_s16 = value;
       }
       break;
@@ -2114,7 +2115,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_32_u16 = value;
       }
       break;
@@ -2122,7 +2123,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
-        value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
+        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
         fields->f_dsp_32_u24 = value;
       }
       break;
@@ -2130,7 +2131,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
-        value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
+        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
         fields->f_dsp_32_u24 = value;
       }
       break;
@@ -2141,7 +2142,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         fields->f_dsp_40_s16 = value;
       }
       break;
@@ -2152,7 +2153,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_40_u16 = value;
       }
       break;
@@ -2160,7 +2161,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 20, 32, total_length, pc, & value);
-        value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
+        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (983040))));
         fields->f_dsp_40_u20 = value;
       }
       break;
@@ -2168,7 +2169,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
-        value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
+        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
         fields->f_dsp_40_u24 = value;
       }
       break;
@@ -2179,7 +2180,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         fields->f_dsp_48_s16 = value;
       }
       break;
@@ -2190,7 +2191,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_48_u16 = value;
       }
       break;
@@ -2199,7 +2200,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
         {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_48_u16 = value;
       }
         if (length <= 0) break;
@@ -2215,7 +2216,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
         {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_48_u16 = value;
       }
         if (length <= 0) break;
@@ -2233,7 +2234,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
+        value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
         fields->f_dsp_8_s24 = value;
       }
       break;
@@ -2244,7 +2245,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_8_u16 = value;
       }
       break;
@@ -2252,7 +2253,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
+        value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
         fields->f_dsp_8_u24 = value;
       }
       break;
@@ -2344,7 +2345,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
-        value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
+        value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
         fields->f_dst32_rn_prefixed_QI = value;
       }
       break;
@@ -2368,7 +2369,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
-        value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
+        value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
         fields->f_dst32_rn_unprefixed_QI = value;
       }
       break;
@@ -2395,7 +2396,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         fields->f_dsp_16_s16 = value;
       }
       break;
@@ -2407,14 +2408,14 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
         {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_16_u16 = value;
       }
         if (length <= 0) break;
         {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_32_u16 = value;
       }
         if (length <= 0) break;
@@ -2447,7 +2448,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
         {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
-        value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
+        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
         fields->f_dsp_32_u24 = value;
       }
         if (length <= 0) break;
@@ -2460,7 +2461,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         fields->f_dsp_32_s16 = value;
       }
       break;
@@ -2471,7 +2472,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value);
-        value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
+        value = EXTSISI (((((((((UINT) (value) >> (24))) & (255))) | (((((UINT) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
         fields->f_dsp_32_s32 = value;
       }
       break;
@@ -2479,7 +2480,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         fields->f_dsp_40_s16 = value;
       }
       break;
@@ -2491,7 +2492,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
         {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
-        value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
+        value = ((((((((USI) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
         fields->f_dsp_40_u24 = value;
       }
         if (length <= 0) break;
@@ -2506,7 +2507,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         fields->f_dsp_48_s16 = value;
       }
       break;
@@ -2518,14 +2519,14 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
         {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_48_u16 = value;
       }
         if (length <= 0) break;
         {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
+        value = ((((((UHI) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
         fields->f_dsp_64_u16 = value;
       }
         if (length <= 0) break;
@@ -2552,7 +2553,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value);
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         fields->f_dsp_64_s16 = value;
       }
       break;
@@ -2560,7 +2561,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value);
-        value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
+        value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
         fields->f_dsp_8_s16 = value;
       }
       break;
@@ -2645,7 +2646,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (((value) & (65535))) >> (8))) | (((int) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1))));
+        value = ((((((USI) (((value) & (65535))) >> (8))) | (((SI) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1))));
         fields->f_lab_8_16 = value;
       }
       break;
@@ -2653,7 +2654,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value);
-        value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
+        value = ((((((USI) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
         fields->f_lab_8_24 = value;
       }
       break;
@@ -2758,7 +2759,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
-        value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
+        value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
         fields->f_src32_rn_prefixed_QI = value;
       }
       break;
@@ -2782,7 +2783,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
       {
         long value;
         length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
-        value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
+        value = (((((~ (((USI) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
         fields->f_src32_rn_unprefixed_QI = value;
       }
       break;

diff --git a/opcodes/m32r-ibld.c b/opcodes/m32r-ibld.c
index b049c47315b81d079408688b6e167985e9947407..8e3319f796b1f517613f8218c06c0cf6f7e35ea5 100644 (file)
--- a/opcodes/m32r-ibld.c
+++ b/opcodes/m32r-ibld.c
@@ -33,6 +33,7 @@
 #include "symcat.h"
 #include "m32r-desc.h"
 #include "m32r-opc.h"
+#include "cgen/basic-modes.h"
 #include "opintl.h"
 #include "safe-ctype.h"
 
@@ -580,21 +581,21 @@ m32r_cgen_insert_operand (CGEN_CPU_DESC cd,
     case M32R_OPERAND_DISP16 :
       {
         long value = fields->f_disp16;
-        value = ((int) (((value) - (pc))) >> (2));
+        value = ((SI) (((value) - (pc))) >> (2));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 16, 32, total_length, buffer);
       }
       break;
     case M32R_OPERAND_DISP24 :
       {
         long value = fields->f_disp24;
-        value = ((int) (((value) - (pc))) >> (2));
+        value = ((SI) (((value) - (pc))) >> (2));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 24, 32, total_length, buffer);
       }
       break;
     case M32R_OPERAND_DISP8 :
       {
         long value = fields->f_disp8;
-        value = ((int) (((value) - (((pc) & (-4))))) >> (2));
+        value = ((SI) (((value) - (((pc) & (-4))))) >> (2));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
       }
       break;

diff --git a/opcodes/mep-ibld.c b/opcodes/mep-ibld.c
index aef267a604c1fd6f873538a9b0e81ecde2f3862b..f0bbab51d7b83e538fb1d75c87fa089f94327ef5 100644 (file)
--- a/opcodes/mep-ibld.c
+++ b/opcodes/mep-ibld.c
@@ -33,6 +33,7 @@
 #include "symcat.h"
 #include "mep-desc.h"
 #include "mep-opc.h"
+#include "cgen/basic-modes.h"
 #include "opintl.h"
 #include "safe-ctype.h"
 
@@ -568,8 +569,8 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_ADDR24A4 :
       {
 {
-  FLD (f_24u8a4n_hi) = ((unsigned int) (FLD (f_24u8a4n)) >> (8));
-  FLD (f_24u8a4n_lo) = ((unsigned int) (((FLD (f_24u8a4n)) & (252))) >> (2));
+  FLD (f_24u8a4n_hi) = ((UINT) (FLD (f_24u8a4n)) >> (8));
+  FLD (f_24u8a4n_lo) = ((UINT) (((FLD (f_24u8a4n)) & (252))) >> (2));
 }
         errmsg = insert_normal (cd, fields->f_24u8a4n_hi, 0, 0, 16, 16, 32, total_length, buffer);
         if (errmsg)
@@ -582,7 +583,7 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_C5RMUIMM20 :
       {
 {
-  FLD (f_c5_rm) = ((unsigned int) (FLD (f_c5_rmuimm20)) >> (16));
+  FLD (f_c5_rm) = ((UINT) (FLD (f_c5_rmuimm20)) >> (16));
   FLD (f_c5_16u16) = ((FLD (f_c5_rmuimm20)) & (65535));
 }
         errmsg = insert_normal (cd, fields->f_c5_rm, 0, 0, 8, 4, 32, total_length, buffer);
@@ -596,7 +597,7 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_C5RNMUIMM24 :
       {
 {
-  FLD (f_c5_rnm) = ((unsigned int) (FLD (f_c5_rnmuimm24)) >> (16));
+  FLD (f_c5_rnm) = ((UINT) (FLD (f_c5_rnmuimm24)) >> (16));
   FLD (f_c5_16u16) = ((FLD (f_c5_rnmuimm24)) & (65535));
 }
         errmsg = insert_normal (cd, fields->f_c5_rnm, 0, 0, 4, 8, 32, total_length, buffer);
@@ -610,9 +611,9 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_CALLNUM :
       {
 {
-  FLD (f_5) = ((((unsigned int) (FLD (f_callnum)) >> (3))) & (1));
-  FLD (f_6) = ((((unsigned int) (FLD (f_callnum)) >> (2))) & (1));
-  FLD (f_7) = ((((unsigned int) (FLD (f_callnum)) >> (1))) & (1));
+  FLD (f_5) = ((((UINT) (FLD (f_callnum)) >> (3))) & (1));
+  FLD (f_6) = ((((UINT) (FLD (f_callnum)) >> (2))) & (1));
+  FLD (f_7) = ((((UINT) (FLD (f_callnum)) >> (1))) & (1));
   FLD (f_11) = ((FLD (f_callnum)) & (1));
 }
         errmsg = insert_normal (cd, fields->f_5, 0, 0, 5, 1, 32, total_length, buffer);
@@ -635,7 +636,7 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_CCRN :
       {
 {
-  FLD (f_ccrn_hi) = ((((unsigned int) (FLD (f_ccrn)) >> (4))) & (3));
+  FLD (f_ccrn_hi) = ((((UINT) (FLD (f_ccrn)) >> (4))) & (3));
   FLD (f_ccrn_lo) = ((FLD (f_ccrn)) & (15));
 }
         errmsg = insert_normal (cd, fields->f_ccrn_hi, 0, 0, 28, 2, 32, total_length, buffer);
@@ -689,7 +690,7 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_CODE24 :
       {
 {
-  FLD (f_24u4n_hi) = ((unsigned int) (FLD (f_24u4n)) >> (16));
+  FLD (f_24u4n_hi) = ((UINT) (FLD (f_24u4n)) >> (16));
   FLD (f_24u4n_lo) = ((FLD (f_24u4n)) & (65535));
 }
         errmsg = insert_normal (cd, fields->f_24u4n_hi, 0, 0, 4, 8, 32, total_length, buffer);
@@ -712,7 +713,7 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_crnx_lo) = ((FLD (f_crnx)) & (15));
-  FLD (f_crnx_hi) = ((unsigned int) (FLD (f_crnx)) >> (4));
+  FLD (f_crnx_hi) = ((UINT) (FLD (f_crnx)) >> (4));
 }
         errmsg = insert_normal (cd, fields->f_crnx_hi, 0, 0, 28, 1, 32, total_length, buffer);
         if (errmsg)
@@ -726,7 +727,7 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_crnx_lo) = ((FLD (f_crnx)) & (15));
-  FLD (f_crnx_hi) = ((unsigned int) (FLD (f_crnx)) >> (4));
+  FLD (f_crnx_hi) = ((UINT) (FLD (f_crnx)) >> (4));
 }
         errmsg = insert_normal (cd, fields->f_crnx_hi, 0, 0, 28, 1, 32, total_length, buffer);
         if (errmsg)
@@ -758,7 +759,7 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_csrn_lo) = ((FLD (f_csrn)) & (15));
-  FLD (f_csrn_hi) = ((unsigned int) (FLD (f_csrn)) >> (4));
+  FLD (f_csrn_hi) = ((UINT) (FLD (f_csrn)) >> (4));
 }
         errmsg = insert_normal (cd, fields->f_csrn_hi, 0, 0, 15, 1, 32, total_length, buffer);
         if (errmsg)
@@ -772,7 +773,7 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_csrn_lo) = ((FLD (f_csrn)) & (15));
-  FLD (f_csrn_hi) = ((unsigned int) (FLD (f_csrn)) >> (4));
+  FLD (f_csrn_hi) = ((UINT) (FLD (f_csrn)) >> (4));
 }
         errmsg = insert_normal (cd, fields->f_csrn_hi, 0, 0, 15, 1, 32, total_length, buffer);
         if (errmsg)
@@ -795,7 +796,7 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_IMM16P0 :
       {
 {
-  FLD (f_ivc2_8u0) = ((((unsigned int) (FLD (f_ivc2_imm16p0)) >> (8))) & (255));
+  FLD (f_ivc2_8u0) = ((((UINT) (FLD (f_ivc2_imm16p0)) >> (8))) & (255));
   FLD (f_ivc2_8u20) = ((FLD (f_ivc2_imm16p0)) & (255));
 }
         errmsg = insert_normal (cd, fields->f_ivc2_8u0, 0, 0, 0, 8, 32, total_length, buffer);
@@ -927,7 +928,7 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_IVC2C3CCRN :
       {
 {
-  FLD (f_ivc2_ccrn_c3hi) = ((((unsigned int) (FLD (f_ivc2_ccrn_c3)) >> (4))) & (3));
+  FLD (f_ivc2_ccrn_c3hi) = ((((UINT) (FLD (f_ivc2_ccrn_c3)) >> (4))) & (3));
   FLD (f_ivc2_ccrn_c3lo) = ((FLD (f_ivc2_ccrn_c3)) & (15));
 }
         errmsg = insert_normal (cd, fields->f_ivc2_ccrn_c3hi, 0, 0, 28, 2, 32, total_length, buffer);
@@ -941,7 +942,7 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_IVC2CCRN :
       {
 {
-  FLD (f_ivc2_ccrn_h2) = ((((unsigned int) (FLD (f_ivc2_ccrn)) >> (4))) & (3));
+  FLD (f_ivc2_ccrn_h2) = ((((UINT) (FLD (f_ivc2_ccrn)) >> (4))) & (3));
   FLD (f_ivc2_ccrn_lo) = ((FLD (f_ivc2_ccrn)) & (15));
 }
         errmsg = insert_normal (cd, fields->f_ivc2_ccrn_h2, 0, 0, 20, 2, 32, total_length, buffer);
@@ -955,7 +956,7 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_IVC2CRN :
       {
 {
-  FLD (f_ivc2_ccrn_h1) = ((((unsigned int) (FLD (f_ivc2_crnx)) >> (4))) & (1));
+  FLD (f_ivc2_ccrn_h1) = ((((UINT) (FLD (f_ivc2_crnx)) >> (4))) & (1));
   FLD (f_ivc2_ccrn_lo) = ((FLD (f_ivc2_crnx)) & (15));
 }
         errmsg = insert_normal (cd, fields->f_ivc2_ccrn_h1, 0, 0, 20, 1, 32, total_length, buffer);
@@ -988,8 +989,8 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_PCABS24A2 :
       {
 {
-  FLD (f_24u5a2n_lo) = ((unsigned int) (((FLD (f_24u5a2n)) & (255))) >> (1));
-  FLD (f_24u5a2n_hi) = ((unsigned int) (FLD (f_24u5a2n)) >> (8));
+  FLD (f_24u5a2n_lo) = ((UINT) (((FLD (f_24u5a2n)) & (255))) >> (1));
+  FLD (f_24u5a2n_hi) = ((UINT) (FLD (f_24u5a2n)) >> (8));
 }
         errmsg = insert_normal (cd, fields->f_24u5a2n_hi, 0, 0, 16, 16, 32, total_length, buffer);
         if (errmsg)
@@ -1002,14 +1003,14 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_PCREL12A2 :
       {
         long value = fields->f_12s4a2;
-        value = ((int) (((value) - (pc))) >> (1));
+        value = ((SI) (((value) - (pc))) >> (1));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 4, 11, 32, total_length, buffer);
       }
       break;
     case MEP_OPERAND_PCREL17A2 :
       {
         long value = fields->f_17s16a2;
-        value = ((int) (((value) - (pc))) >> (1));
+        value = ((SI) (((value) - (pc))) >> (1));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 16, 32, total_length, buffer);
       }
       break;
@@ -1017,8 +1018,8 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_24s5a2n) = ((FLD (f_24s5a2n)) - (pc));
-  FLD (f_24s5a2n_lo) = ((unsigned int) (((FLD (f_24s5a2n)) & (254))) >> (1));
-  FLD (f_24s5a2n_hi) = ((int) (FLD (f_24s5a2n)) >> (8));
+  FLD (f_24s5a2n_lo) = ((UINT) (((FLD (f_24s5a2n)) & (254))) >> (1));
+  FLD (f_24s5a2n_hi) = ((INT) (FLD (f_24s5a2n)) >> (8));
 }
         errmsg = insert_normal (cd, fields->f_24s5a2n_hi, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 16, 32, total_length, buffer);
         if (errmsg)
@@ -1031,7 +1032,7 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_PCREL8A2 :
       {
         long value = fields->f_8s8a2;
-        value = ((int) (((value) - (pc))) >> (1));
+        value = ((SI) (((value) - (pc))) >> (1));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 7, 32, total_length, buffer);
       }
       break;
@@ -1106,7 +1107,7 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_SIMM16P0 :
       {
 {
-  FLD (f_ivc2_8u0) = ((((unsigned int) (FLD (f_ivc2_simm16p0)) >> (8))) & (255));
+  FLD (f_ivc2_8u0) = ((((UINT) (FLD (f_ivc2_simm16p0)) >> (8))) & (255));
   FLD (f_ivc2_8u20) = ((FLD (f_ivc2_simm16p0)) & (255));
 }
         errmsg = insert_normal (cd, fields->f_ivc2_8u0, 0, 0, 0, 8, 32, total_length, buffer);
@@ -1149,14 +1150,14 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_UDISP7A2 :
       {
         long value = fields->f_7u9a2;
-        value = ((unsigned int) (value) >> (1));
+        value = ((USI) (value) >> (1));
         errmsg = insert_normal (cd, value, 0, 0, 9, 6, 32, total_length, buffer);
       }
       break;
     case MEP_OPERAND_UDISP7A4 :
       {
         long value = fields->f_7u9a4;
-        value = ((unsigned int) (value) >> (2));
+        value = ((USI) (value) >> (2));
         errmsg = insert_normal (cd, value, 0, 0, 9, 5, 32, total_length, buffer);
       }
       break;
@@ -1169,7 +1170,7 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_UIMM24 :
       {
 {
-  FLD (f_24u8n_hi) = ((unsigned int) (FLD (f_24u8n)) >> (8));
+  FLD (f_24u8n_hi) = ((UINT) (FLD (f_24u8n)) >> (8));
   FLD (f_24u8n_lo) = ((FLD (f_24u8n)) & (255));
 }
         errmsg = insert_normal (cd, fields->f_24u8n_hi, 0, 0, 16, 16, 32, total_length, buffer);
@@ -1192,7 +1193,7 @@ mep_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MEP_OPERAND_UIMM7A4 :
       {
         long value = fields->f_7u9a4;
-        value = ((unsigned int) (value) >> (2));
+        value = ((USI) (value) >> (2));
         errmsg = insert_normal (cd, value, 0, 0, 9, 5, 32, total_length, buffer);
       }
       break;

diff --git a/opcodes/mt-ibld.c b/opcodes/mt-ibld.c
index 162800b87972f6575ff85ba1b3e41b6439bd0c7a..d5cd14e4d0db395167302f86059cf3f5d95b9456 100644 (file)
--- a/opcodes/mt-ibld.c
+++ b/opcodes/mt-ibld.c
@@ -33,6 +33,7 @@
 #include "symcat.h"
 #include "mt-desc.h"
 #include "mt-opc.h"
+#include "cgen/basic-modes.h"
 #include "opintl.h"
 #include "safe-ctype.h"
 
@@ -681,7 +682,7 @@ mt_cgen_insert_operand (CGEN_CPU_DESC cd,
     case MT_OPERAND_LOOPSIZE :
       {
         long value = fields->f_loopo;
-        value = ((unsigned int) (value) >> (2));
+        value = ((USI) (value) >> (2));
         errmsg = insert_normal (cd, value, 0, 0, 7, 8, 32, total_length, buffer);
       }
       break;

diff --git a/opcodes/openrisc-ibld.c b/opcodes/openrisc-ibld.c
index 27f2ad62098b45f43003df15301c957c3fa03787..29372a679889d662250054af0fbb3823c88fe49e 100644 (file)
--- a/opcodes/openrisc-ibld.c
+++ b/opcodes/openrisc-ibld.c
@@ -33,6 +33,7 @@
 #include "symcat.h"
 #include "openrisc-desc.h"
 #include "openrisc-opc.h"
+#include "cgen/basic-modes.h"
 #include "opintl.h"
 #include "safe-ctype.h"
 
@@ -568,14 +569,14 @@ openrisc_cgen_insert_operand (CGEN_CPU_DESC cd,
     case OPENRISC_OPERAND_ABS_26 :
       {
         long value = fields->f_abs26;
-        value = ((int) (pc) >> (2));
+        value = ((SI) (pc) >> (2));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_ABS_ADDR), 0, 25, 26, 32, total_length, buffer);
       }
       break;
     case OPENRISC_OPERAND_DISP_26 :
       {
         long value = fields->f_disp26;
-        value = ((int) (((value) - (pc))) >> (2));
+        value = ((SI) (((value) - (pc))) >> (2));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 25, 26, 32, total_length, buffer);
       }
       break;
@@ -606,7 +607,7 @@ openrisc_cgen_insert_operand (CGEN_CPU_DESC cd,
     case OPENRISC_OPERAND_UI16NC :
       {
 {
-  FLD (f_i16_2) = ((((int) (FLD (f_i16nc)) >> (11))) & (31));
+  FLD (f_i16_2) = ((((HI) (FLD (f_i16nc)) >> (11))) & (31));
   FLD (f_i16_1) = ((FLD (f_i16nc)) & (2047));
 }
         errmsg = insert_normal (cd, fields->f_i16_1, 0, 0, 10, 11, 32, total_length, buffer);

diff --git a/opcodes/xc16x-ibld.c b/opcodes/xc16x-ibld.c
index 0390c8bc2c9569700e94debb4afd6c07525edca9..70558cf5420228e3fb4cb818a5b1f3f8a5a0e581 100644 (file)
--- a/opcodes/xc16x-ibld.c
+++ b/opcodes/xc16x-ibld.c
@@ -33,6 +33,7 @@
 #include "symcat.h"
 #include "xc16x-desc.h"
 #include "xc16x-opc.h"
+#include "cgen/basic-modes.h"
 #include "opintl.h"
 #include "safe-ctype.h"
 

diff --git a/opcodes/xstormy16-ibld.c b/opcodes/xstormy16-ibld.c
index 06e2f1a17fa27e73b2d6a6b63a4b357163da9276..a73467748bdff23a302d93b535ba6707f1aef88e 100644 (file)
--- a/opcodes/xstormy16-ibld.c
+++ b/opcodes/xstormy16-ibld.c
@@ -33,6 +33,7 @@
 #include "symcat.h"
 #include "xstormy16-desc.h"
 #include "xstormy16-opc.h"
+#include "cgen/basic-modes.h"
 #include "opintl.h"
 #include "safe-ctype.h"
 
@@ -587,7 +588,7 @@ xstormy16_cgen_insert_operand (CGEN_CPU_DESC cd,
       {
 {
   FLD (f_abs24_1) = ((FLD (f_abs24)) & (255));
-  FLD (f_abs24_2) = ((unsigned int) (FLD (f_abs24)) >> (8));
+  FLD (f_abs24_2) = ((UINT) (FLD (f_abs24)) >> (8));
 }
         errmsg = insert_normal (cd, fields->f_abs24_1, 0, 0, 8, 8, 32, total_length, buffer);
         if (errmsg)
@@ -647,7 +648,7 @@ xstormy16_cgen_insert_operand (CGEN_CPU_DESC cd,
     case XSTORMY16_OPERAND_REL12A :
       {
         long value = fields->f_rel12a;
-        value = ((int) (((value) - (((pc) + (2))))) >> (1));
+        value = ((SI) (((value) - (((pc) + (2))))) >> (1));
         errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 4, 11, 32, total_length, buffer);
       }
       break;