int SPC_REGNUM; /* sh3, sh3-dsp, sh3e, sh4 */
int RS_REGNUM; /* sh-dsp, sh3-dsp */
int RE_REGNUM; /* sh-dsp, sh3-dsp */
- int DR0_REGNUM;
- int DR1_REGNUM;
- int DR2_REGNUM;
- int DR3_REGNUM;
- int DR4_REGNUM;
- int DR5_REGNUM;
- int DR6_REGNUM;
- int DR7_REGNUM;
- int FV0_REGNUM;
- int FV1_REGNUM;
- int FV2_REGNUM;
- int FV3_REGNUM;
+ int DR0_REGNUM; /* sh4 */
+ int DR2_REGNUM; /* sh4 */
+ int DR4_REGNUM; /* sh4 */
+ int DR6_REGNUM; /* sh4 */
+ int DR8_REGNUM; /* sh4 */
+ int DR10_REGNUM; /* sh4 */
+ int DR12_REGNUM; /* sh4 */
+ int DR14_REGNUM; /* sh4 */
+ int FV0_REGNUM; /* sh4 */
+ int FV4_REGNUM; /* sh4 */
+ int FV8_REGNUM; /* sh4 */
+ int FV12_REGNUM; /* sh4 */
};
/* Registers common to all the SH variants. */
"ssr", "spc",
"r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
"r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1",
- "dr0", "dr1", "dr2", "dr3", "dr4", "dr5", "dr6", "dr7",
- "fv0", "fv1", "fv2", "fv3",
+ "dr0", "dr2", "dr4", "dr6", "dr8", "dr10", "dr12", "dr14",
+ "fv0", "fv4", "fv8", "fv12",
};
if (reg_nr < 0)
return NULL;
int reg_nr;
{
if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
- && reg_nr <= gdbarch_tdep (current_gdbarch)->DR7_REGNUM)
+ && reg_nr <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
return (dr_reg_base_num (reg_nr) * 4);
else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
- && reg_nr <= gdbarch_tdep (current_gdbarch)->FV3_REGNUM)
+ && reg_nr <= gdbarch_tdep (current_gdbarch)->FV12_REGNUM)
return (fv_reg_base_num (reg_nr) * 4);
else
return (reg_nr * 4);
int reg_nr;
{
if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
- && reg_nr <= gdbarch_tdep (current_gdbarch)->DR7_REGNUM)
+ && reg_nr <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
return 8;
else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
- && reg_nr <= gdbarch_tdep (current_gdbarch)->FV3_REGNUM)
+ && reg_nr <= gdbarch_tdep (current_gdbarch)->FV12_REGNUM)
return 16;
else
return 4;
|| (reg_nr == gdbarch_tdep (current_gdbarch)->FPUL_REGNUM))
return builtin_type_float;
else if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
- && reg_nr <= gdbarch_tdep (current_gdbarch)->DR7_REGNUM)
+ && reg_nr <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
return builtin_type_double;
else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
- && reg_nr <= gdbarch_tdep (current_gdbarch)->FV3_REGNUM)
+ && reg_nr <= gdbarch_tdep (current_gdbarch)->FV12_REGNUM)
return sh_sh4_build_float_register_type (3);
else
return builtin_type_int;
if (!register_cached (reg_nr))
{
if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
- && reg_nr <= gdbarch_tdep (current_gdbarch)->DR7_REGNUM)
+ && reg_nr <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
{
base_regnum = dr_reg_base_num (reg_nr);
target_fetch_registers (base_regnum + portion);
}
else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
- && reg_nr <= gdbarch_tdep (current_gdbarch)->FV3_REGNUM)
+ && reg_nr <= gdbarch_tdep (current_gdbarch)->FV12_REGNUM)
{
base_regnum = fv_reg_base_num (reg_nr);
int base_regnum, portion;
if (reg_nr >= gdbarch_tdep (current_gdbarch)->DR0_REGNUM
- && reg_nr <= gdbarch_tdep (current_gdbarch)->DR7_REGNUM)
+ && reg_nr <= gdbarch_tdep (current_gdbarch)->DR14_REGNUM)
{
base_regnum = dr_reg_base_num (reg_nr);
}
}
else if (reg_nr >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM
- && reg_nr <= gdbarch_tdep (current_gdbarch)->FV3_REGNUM)
+ && reg_nr <= gdbarch_tdep (current_gdbarch)->FV12_REGNUM)
{
base_regnum = fv_reg_base_num (reg_nr);
regnum < gdbarch_tdep (current_gdbarch)->FV0_REGNUM)
do_dr_register_info (regnum);
else if (regnum >= gdbarch_tdep (current_gdbarch)->FV0_REGNUM &&
- regnum <= gdbarch_tdep (current_gdbarch)->FV3_REGNUM)
+ regnum <= gdbarch_tdep (current_gdbarch)->FV12_REGNUM)
do_fv_register_info (regnum);
}
tdep->SSR_REGNUM = -1;
tdep->SPC_REGNUM = -1;
tdep->DR0_REGNUM = -1;
- tdep->DR1_REGNUM = -1;
tdep->DR2_REGNUM = -1;
- tdep->DR3_REGNUM = -1;
tdep->DR4_REGNUM = -1;
- tdep->DR5_REGNUM = -1;
tdep->DR6_REGNUM = -1;
- tdep->DR7_REGNUM = -1;
+ tdep->DR8_REGNUM = -1;
+ tdep->DR10_REGNUM = -1;
+ tdep->DR12_REGNUM = -1;
+ tdep->DR14_REGNUM = -1;
tdep->FV0_REGNUM = -1;
- tdep->FV1_REGNUM = -1;
- tdep->FV2_REGNUM = -1;
- tdep->FV3_REGNUM = -1;
+ tdep->FV4_REGNUM = -1;
+ tdep->FV8_REGNUM = -1;
+ tdep->FV12_REGNUM = -1;
set_gdbarch_fp0_regnum (gdbarch, -1);
set_gdbarch_num_pseudo_regs (gdbarch, 0);
set_gdbarch_max_register_raw_size (gdbarch, 4);
tdep->SSR_REGNUM = 41;
tdep->SPC_REGNUM = 42;
tdep->DR0_REGNUM = 59;
- tdep->DR1_REGNUM = 60;
- tdep->DR2_REGNUM = 61;
- tdep->DR3_REGNUM = 62;
- tdep->DR4_REGNUM = 63;
- tdep->DR5_REGNUM = 64;
- tdep->DR6_REGNUM = 65;
- tdep->DR7_REGNUM = 66;
+ tdep->DR2_REGNUM = 60;
+ tdep->DR4_REGNUM = 61;
+ tdep->DR6_REGNUM = 62;
+ tdep->DR8_REGNUM = 63;
+ tdep->DR10_REGNUM = 64;
+ tdep->DR12_REGNUM = 65;
+ tdep->DR14_REGNUM = 66;
tdep->FV0_REGNUM = 67;
- tdep->FV1_REGNUM = 68;
- tdep->FV2_REGNUM = 69;
- tdep->FV3_REGNUM = 70;
+ tdep->FV4_REGNUM = 68;
+ tdep->FV8_REGNUM = 69;
+ tdep->FV12_REGNUM = 70;
break;
default:
sh_register_name = sh_generic_register_name;