i965/ps/gen8: Refactor state uploading

v2: Use SET_FIELD() for sampler count, and for that reason
    added GEN7_PS_SAMPLER_COUNT_MASK.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index f8d56b9848ed13ff7e6ad305ee8f8597ed89c398..13d541b48ed884dfff89255ff6a4fffa458c6cbf 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -265,6 +265,18 @@ void gen7_set_surface_mcs_info(struct brw_context *brw,
 void gen7_check_surface_setup(uint32_t *surf, bool is_render_target);
 void gen7_init_vtable_surface_functions(struct brw_context *brw);
 
+/* gen8_ps_state.c */
+void gen8_upload_ps_state(struct brw_context *brw,
+                          const struct gl_fragment_program *fp,
+                          const struct brw_stage_state *stage_state,
+                          const struct brw_wm_prog_data *prog_data,
+                          uint32_t fast_clear_op);
+
+void gen8_upload_ps_extra(struct brw_context *brw,
+                          const struct gl_fragment_program *fp,
+                          const struct brw_wm_prog_data *prog_data,
+                          bool multisampled_fbo);
+
 /* gen7_sol_state.c */
 void gen7_upload_3dstate_so_decl_list(struct brw_context *brw,
                                       const struct brw_vue_map *vue_map);

diff --git a/src/mesa/drivers/dri/i965/gen8_ps_state.c b/src/mesa/drivers/dri/i965/gen8_ps_state.c
index 84811533bba3ff7ce31bd6beacc3b98f95806e42..85ad3b6c551cf4c100b1dce9aca91575fe8e4af8 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen8_ps_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_ps_state.c
@@ -27,15 +27,13 @@
 #include "brw_defines.h"
 #include "intel_batchbuffer.h"
 
-static void
-upload_ps_extra(struct brw_context *brw)
+void
+gen8_upload_ps_extra(struct brw_context *brw,
+                     const struct gl_fragment_program *fp,
+                     const struct brw_wm_prog_data *prog_data,
+                     bool multisampled_fbo)
 {
    struct gl_context *ctx = &brw->ctx;
-   /* BRW_NEW_FRAGMENT_PROGRAM */
-   const struct brw_fragment_program *fp =
-      brw_fragment_program_const(brw->fragment_program);
-   /* BRW_NEW_FS_PROG_DATA */
-   const struct brw_wm_prog_data *prog_data = brw->wm.prog_data;
    uint32_t dw1 = 0;
 
    dw1 |= GEN8_PSX_PIXEL_SHADER_VALID;
@@ -47,16 +45,14 @@ upload_ps_extra(struct brw_context *brw)
    if (prog_data->num_varying_inputs != 0)
       dw1 |= GEN8_PSX_ATTRIBUTE_ENABLE;
 
-   if (fp->program.Base.InputsRead & VARYING_BIT_POS)
+   if (fp->Base.InputsRead & VARYING_BIT_POS)
       dw1 |= GEN8_PSX_USES_SOURCE_DEPTH | GEN8_PSX_USES_SOURCE_W;
 
-   /* BRW_NEW_NUM_SAMPLES | _NEW_MULTISAMPLE */
-   bool multisampled_fbo = brw->num_samples > 1;
    if (multisampled_fbo &&
-       _mesa_get_min_invocations_per_fragment(ctx, &fp->program, false) > 1)
+       _mesa_get_min_invocations_per_fragment(ctx, fp, false) > 1)
       dw1 |= GEN8_PSX_SHADER_IS_PER_SAMPLE;
 
-   if (fp->program.Base.SystemValuesRead & SYSTEM_BIT_SAMPLE_MASK_IN)
+   if (fp->Base.SystemValuesRead & SYSTEM_BIT_SAMPLE_MASK_IN)
       dw1 |= GEN8_PSX_SHADER_USES_INPUT_COVERAGE_MASK;
 
    if (prog_data->uses_omask)
@@ -68,6 +64,20 @@ upload_ps_extra(struct brw_context *brw)
    ADVANCE_BATCH();
 }
 
+static void
+upload_ps_extra(struct brw_context *brw)
+{
+   /* BRW_NEW_FRAGMENT_PROGRAM */
+   const struct brw_fragment_program *fp =
+      brw_fragment_program_const(brw->fragment_program);
+   /* BRW_NEW_FS_PROG_DATA */
+   const struct brw_wm_prog_data *prog_data = brw->wm.prog_data;
+   /* BRW_NEW_NUM_SAMPLES | _NEW_MULTISAMPLE */
+   const bool multisampled_fbo = brw->num_samples > 1;
+
+   gen8_upload_ps_extra(brw, &fp->program, prog_data, multisampled_fbo);
+}
+
 const struct brw_tracked_state gen8_ps_extra = {
    .dirty = {
       .mesa  = _NEW_MULTISAMPLE,
@@ -118,15 +128,16 @@ const struct brw_tracked_state gen8_wm_state = {
    .emit = upload_wm_state,
 };
 
-static void
-upload_ps_state(struct brw_context *brw)
+void
+gen8_upload_ps_state(struct brw_context *brw,
+                     const struct gl_fragment_program *fp,
+                     const struct brw_stage_state *stage_state,
+                     const struct brw_wm_prog_data *prog_data,
+                     uint32_t fast_clear_op)
 {
    struct gl_context *ctx = &brw->ctx;
    uint32_t dw3 = 0, dw6 = 0, dw7 = 0, ksp0, ksp2 = 0;
 
-   /* BRW_NEW_FS_PROG_DATA */
-   const struct brw_wm_prog_data *prog_data = brw->wm.prog_data;
-
    /* Initialize the execution mask with VMask.  Otherwise, derivatives are
     * incorrect for subspans where some of the pixels are unlit.  We believe
     * the bit just didn't take effect in previous generations.
@@ -134,7 +145,7 @@ upload_ps_state(struct brw_context *brw)
    dw3 |= GEN7_PS_VECTOR_MASK_ENABLE;
 
    const unsigned sampler_count =
-      DIV_ROUND_UP(CLAMP(brw->wm.base.sampler_count, 0, 16), 4);
+      DIV_ROUND_UP(CLAMP(stage_state->sampler_count, 0, 16), 4);
    dw3 |= SET_FIELD(sampler_count, GEN7_PS_SAMPLER_COUNT); 
 
    /* BRW_NEW_FS_PROG_DATA */
@@ -171,12 +182,12 @@ upload_ps_state(struct brw_context *brw)
     * We only require XY sample offsets. So, this recommendation doesn't
     * look useful at the moment. We might need this in future.
     */
-   if (brw->wm.prog_data->uses_pos_offset)
+   if (prog_data->uses_pos_offset)
       dw6 |= GEN7_PS_POSOFFSET_SAMPLE;
    else
       dw6 |= GEN7_PS_POSOFFSET_NONE;
 
-   dw6 |= brw->wm.fast_clear_op;
+   dw6 |= fast_clear_op;
 
    /* _NEW_MULTISAMPLE
     * In case of non 1x per sample shading, only one of SIMD8 and SIMD16
@@ -185,7 +196,7 @@ upload_ps_state(struct brw_context *brw)
     * better performance than 'SIMD8 only' dispatch.
     */
    int min_invocations_per_fragment =
-      _mesa_get_min_invocations_per_fragment(ctx, brw->fragment_program, false);
+      _mesa_get_min_invocations_per_fragment(ctx, fp, false);
    assert(min_invocations_per_fragment >= 1);
 
    if (prog_data->prog_offset_16 || prog_data->no_8) {
@@ -196,19 +207,19 @@ upload_ps_state(struct brw_context *brw)
                  GEN7_PS_DISPATCH_START_GRF_SHIFT_0);
          dw7 |= (prog_data->dispatch_grf_start_reg_16 <<
                  GEN7_PS_DISPATCH_START_GRF_SHIFT_2);
-         ksp0 = brw->wm.base.prog_offset;
-         ksp2 = brw->wm.base.prog_offset + prog_data->prog_offset_16;
+         ksp0 = stage_state->prog_offset;
+         ksp2 = stage_state->prog_offset + prog_data->prog_offset_16;
       } else {
          dw7 |= (prog_data->dispatch_grf_start_reg_16 <<
                  GEN7_PS_DISPATCH_START_GRF_SHIFT_0);
 
-         ksp0 = brw->wm.base.prog_offset + prog_data->prog_offset_16;
+         ksp0 = stage_state->prog_offset + prog_data->prog_offset_16;
       }
    } else {
       dw6 |= GEN7_PS_8_DISPATCH_ENABLE;
       dw7 |= (prog_data->base.dispatch_grf_start_reg <<
               GEN7_PS_DISPATCH_START_GRF_SHIFT_0);
-      ksp0 = brw->wm.base.prog_offset;
+      ksp0 = stage_state->prog_offset;
    }
 
    BEGIN_BATCH(12);
@@ -217,7 +228,7 @@ upload_ps_state(struct brw_context *brw)
    OUT_BATCH(0);
    OUT_BATCH(dw3);
    if (prog_data->base.total_scratch) {
-      OUT_RELOC64(brw->wm.base.scratch_bo,
+      OUT_RELOC64(stage_state->scratch_bo,
                   I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
                   ffs(prog_data->base.total_scratch) - 11);
    } else {
@@ -233,6 +244,15 @@ upload_ps_state(struct brw_context *brw)
    ADVANCE_BATCH();
 }
 
+static void
+upload_ps_state(struct brw_context *brw)
+{
+   /* BRW_NEW_FS_PROG_DATA */
+   const struct brw_wm_prog_data *prog_data = brw->wm.prog_data;
+   gen8_upload_ps_state(brw, brw->fragment_program, &brw->wm.base, prog_data,
+                        brw->wm.fast_clear_op);
+}
+
 const struct brw_tracked_state gen8_ps_state = {
    .dirty = {
       .mesa  = _NEW_MULTISAMPLE,