}
+void
+CommMonitor::regProbePoints()
+{
+ ppPktReq.reset(new ProbePoints::Packet(getProbeManager(), "PktRequest"));
+ ppPktResp.reset(new ProbePoints::Packet(getProbeManager(), "PktResponse"));
+}
+
BaseMasterPort&
CommMonitor::getMasterPort(const std::string& if_name, PortID idx)
{
Tick
CommMonitor::recvAtomic(PacketPtr pkt)
{
+ ppPktReq->notify(pkt);
+
// do stack distance calculations if enabled
if (stackDistCalc)
stackDistCalc->update(pkt->cmd, pkt->getAddr());
traceStream->write(pkt_msg);
}
- return masterPort.sendAtomic(pkt);
+ const Tick delay(masterPort.sendAtomic(pkt));
+ assert(pkt->isResponse());
+ ppPktResp->notify(pkt);
+ return delay;
}
Tick
// Store relevant fields of packet, because packet may be modified
// or even deleted when sendTiming() is called.
- bool is_read = pkt->isRead();
- bool is_write = pkt->isWrite();
- MemCmd cmd = pkt->cmd;
- int cmd_idx = pkt->cmdToIndex();
- Request::FlagsType req_flags = pkt->req->getFlags();
- unsigned size = pkt->getSize();
- Addr addr = pkt->getAddr();
- bool expects_response = pkt->needsResponse() && !pkt->memInhibitAsserted();
+ const bool is_read = pkt->isRead();
+ const bool is_write = pkt->isWrite();
+ const MemCmd cmd = pkt->cmd;
+ const int cmd_idx = pkt->cmdToIndex();
+ const Request::FlagsType req_flags = pkt->req->getFlags();
+ const unsigned size = pkt->getSize();
+ const Addr addr = pkt->getAddr();
+ const bool expects_response(
+ pkt->needsResponse() && !pkt->memInhibitAsserted());
// If a cache miss is served by a cache, a monitor near the memory
// would see a request which needs a response, but this response
delete pkt->popSenderState();
}
+ if (successful) {
+ // The receiver might already have modified the packet. We
+ // want to give the probe access to the original packet, which
+ // means we need to fake the original packet by temporarily
+ // restoring the command.
+ const MemCmd response_cmd(pkt->cmd);
+ pkt->cmd = cmd;
+ ppPktReq->notify(pkt);
+ pkt->cmd = response_cmd;
+ }
+
// If successful and we are calculating stack distances, update
// the calculator
if (successful && stackDistCalc)
}
}
+ if (successful) {
+ assert(pkt->isResponse());
+ ppPktResp->notify(pkt);
+ }
+
if (successful && is_read) {
// Decrement number of outstanding read requests
DPRINTF(CommMonitor, "Received read response\n");
#include "mem/stack_dist_calc.hh"
#include "params/CommMonitor.hh"
#include "proto/protoio.hh"
+#include "sim/probe/mem.hh"
#include "sim/system.hh"
/**
void init() M5_ATTR_OVERRIDE;
void regStats() M5_ATTR_OVERRIDE;
void startup() M5_ATTR_OVERRIDE;
+ void regProbePoints() M5_ATTR_OVERRIDE;
public: // MemObject interfaces
BaseMasterPort& getMasterPort(const std::string& if_name,
/** Instantiate stats */
MonitorStats stats;
+
+ protected: // Probe points
+ /**
+ * @{
+ * @name Memory system probe points
+ */
+
+ /** Successfully forwarded request packet */
+ ProbePoints::PacketUPtr ppPktReq;
+
+ /** Successfully forwarded response packet */
+ ProbePoints::PacketUPtr ppPktResp;
+
+ /** @} */
};
#endif //__MEM_COMM_MONITOR_HH__
--- /dev/null
+# Copyright (c) 2015 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder. You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Andreas Sandberg
+
+from m5.params import *
+from m5.proxy import *
+from m5.SimObject import SimObject
+
+class BaseMemProbe(SimObject):
+ type = 'BaseMemProbe'
+ abstract = True
+ cxx_header = "mem/probes/base.hh"
+
+ manager = VectorParam.SimObject(Parent.any,
+ "Probe manager(s) to instrument")
+ probe_name = Param.String("PktRequest", "Memory request probe to use")
--- /dev/null
+# -*- mode:python -*-
+
+# Copyright (c) 2015 ARM Limited
+# All rights reserved.
+#
+# The license below extends only to copyright in the software and shall
+# not be construed as granting a license to any other intellectual
+# property including but not limited to intellectual property relating
+# to a hardware implementation of the functionality of the software
+# licensed hereunder. You may use the software subject to the license
+# terms below provided that you ensure that this notice is replicated
+# unmodified and in its entirety in all distributions of the software,
+# modified or unmodified, in source code or in binary form.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+# Authors: Andreas Sandberg
+
+Import('*')
+
+SimObject('BaseMemProbe.py')
+Source('base.cc')
--- /dev/null
+/*
+ * Copyright (c) 2015 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andreas Sandberg
+ */
+
+#include "mem/probes/base.hh"
+
+#include "params/BaseMemProbe.hh"
+
+
+BaseMemProbe::BaseMemProbe(BaseMemProbeParams *p)
+ : SimObject(p)
+{
+}
+
+void
+BaseMemProbe::regProbeListeners()
+{
+ const BaseMemProbeParams *p(
+ dynamic_cast<const BaseMemProbeParams *>(params()));
+ assert(p);
+
+ listeners.resize(p->manager.size());
+ for (int i = 0; i < p->manager.size(); i++) {
+ ProbeManager *const mgr(p->manager[i]->getProbeManager());
+ listeners[i].reset(new PacketListener(*this, mgr, p->probe_name));
+ }
+}
--- /dev/null
+/*
+ * Copyright (c) 2015 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andreas Sandberg
+ */
+
+#ifndef __MEM_PROBES_STACK_BASE_HH__
+#define __MEM_PROBES_STACK_BASE_HH__
+
+#include <memory>
+#include <vector>
+
+#include "mem/packet.hh"
+#include "sim/probe/probe.hh"
+#include "sim/sim_object.hh"
+
+struct BaseMemProbeParams;
+
+/**
+ * Base class for memory system probes accepting Packet instances.
+ *
+ * This is a helper base class for memory system probes that
+ * instrument Packet handling. Unlike the ProbeListenerObject base
+ * class, this class supports instrumentation of multiple ProbeManager
+ * instances. However, it's limited to one probe point name. This
+ * enables features like tracing or stack distance analysis of packets
+ * from multiple components using the same probe. For example, a stack
+ * distance probe could be hooked up to multiple memories in a
+ * multi-channel configuration.
+ */
+class BaseMemProbe : public SimObject
+{
+ public:
+ BaseMemProbe(BaseMemProbeParams *params);
+
+ void regProbeListeners() M5_ATTR_OVERRIDE;
+
+ protected:
+ /**
+ * Callback to analyse intercepted Packets.
+ */
+ virtual void handleRequest(const PacketPtr &pkt) = 0;
+
+ private:
+ class PacketListener : public ProbeListenerArgBase<PacketPtr>
+ {
+ public:
+ PacketListener(BaseMemProbe &_parent,
+ ProbeManager *pm, const std::string &name)
+ : ProbeListenerArgBase(pm, name),
+ parent(_parent) {}
+
+ void notify(const PacketPtr &pkt) M5_ATTR_OVERRIDE {
+ parent.handleRequest(pkt);
+ }
+
+ protected:
+ BaseMemProbe &parent;
+ };
+
+ std::vector<std::unique_ptr<PacketListener>> listeners;
+};
+
+#endif // __MEM_PROBES_STACK_BASE_HH__
--- /dev/null
+/*
+ * Copyright (c) 2015 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andreas Sandberg
+ */
+#ifndef __SIM_PROBE_MEM_HH__
+#define __SIM_PROBE_MEM_HH__
+
+#include <memory>
+
+#include "mem/packet.hh"
+#include "sim/probe/probe.hh"
+
+namespace ProbePoints {
+
+/**
+ * Packet probe point
+ *
+ * This probe point provides a unified interface for components that
+ * want to instrument Packets in the memory system. Components should
+ * when possible adhere to the following naming scheme:
+ *
+ * <ul>
+ *
+ * <li>PktRequest: Requests sent out on the memory side of a normal
+ * components and incoming requests for memories. Packets should
+ * not be duplicated (i.e., a packet should only appear once
+ * irrespective of the receiving end requesting a retry).
+ *
+ * <li>PktResponse: Response received from the memory side of a
+ * normal component or a response being sent out from a memory.
+ *
+ * <li>PktRequestCPU: Incoming, accepted, memory request on the CPU
+ * side of a two-sided component. This probe point is primarily
+ * intended for components that cache or forward requests (e.g.,
+ * caches and XBars), single-sided components should use
+ * PktRequest instead. The probe point should only be called
+ * when a packet is accepted.
+ *
+ * <li>PktResponseCPU: Outgoing response memory request on the CPU
+ * side of a two-sided component. This probe point is primarily
+ * intended for components that cache or forward requests (e.g.,
+ * caches and XBars), single-sided components should use
+ * PktRequest instead.
+ *
+ * </ul>
+ *
+ */
+typedef ProbePointArg< ::PacketPtr> Packet;
+typedef std::unique_ptr<Packet> PacketUPtr;
+
+}
+
+#endif
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