Fix patterns to enable sse-14.c to compile with -masm=intel.

gcc/
        * config/i386/sse.md (define_insn "srcp14<mode>"): Use proper operand
	modifiers.
	(define_insn "rsqrt14<mode>"): Ditto.
	(define_insn "<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>"): Ditto.
	(define_insn "<fixsuffix>fix_truncv2sfv2di2<mask_name>"): Ditto.
	(define_insn "avx512f_<code>v8div16qi2_mask_store"): Ditto.
	(define_insn "vec_set_hi_<mode><mask_name>"): Ditto.
	(define_insn "<mask_codefor>avx512dq_broadcast<mode><mask_name>"):
	Ditto.
	(define_insn "*avx512f_gatherdi<mode>"): Ditto.
	(define_insn "*avx512f_scatterdi<mode>"): Ditto.
	* config/i386/i386.c (ix86_print_operand): Expand check for size
	override codes for Intel syntax.

Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
From-SVN: r236362

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ba2ab0872426a3aa2e434b3853fb1d3c9ae22f29..8aaaa816ebba8113069c83763848508598346994 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,20 @@
+2016-05-18  Petr Murzin  <petr.murzin@intel.com>
+           Kirill Yukhin  <kirill.yukhin@intel.com>
+
+        * config/i386/sse.md (define_insn "srcp14<mode>"): Use proper operand
+       modifiers.
+       (define_insn "rsqrt14<mode>"): Ditto.
+       (define_insn "<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>"): Ditto.
+       (define_insn "<fixsuffix>fix_truncv2sfv2di2<mask_name>"): Ditto.
+       (define_insn "avx512f_<code>v8div16qi2_mask_store"): Ditto.
+       (define_insn "vec_set_hi_<mode><mask_name>"): Ditto.
+       (define_insn "<mask_codefor>avx512dq_broadcast<mode><mask_name>"):
+       Ditto.
+       (define_insn "*avx512f_gatherdi<mode>"): Ditto.
+       (define_insn "*avx512f_scatterdi<mode>"): Ditto.
+       * config/i386/i386.c (ix86_print_operand): Expand check for size
+       override codes for Intel syntax.
+
 2016-05-18  Richard Biener  <rguenther@suse.de>
 
        PR tree-optimization/71168

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index e65f3120b6c84d9cbe33043c5244cfc584237bcc..cecea110e41b3b772374ef5cdf91c8426761d4a9 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -17622,6 +17622,10 @@ ix86_print_operand (FILE *file, rtx x, int code)
            size = "QWORD";
          else if (code == 'x')
            size = "XMMWORD";
+         else if (code == 't')
+           size = "YMMWORD";
+         else if (code == 'g')
+           size = "ZMMWORD";
          else if (mode == BLKmode)
            /* ... or BLKmode operands, when not overridden.  */
            size = NULL;

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index d77227a7c27df85ece0842684f816322eaeea67b..e0af4916bc82b9a0e817e7a79cbd1c4aa95d22a2 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -1485,7 +1485,7 @@
          (match_operand:VF_128 2 "register_operand" "v")
          (const_int 1)))]
   "TARGET_AVX512F"
-  "vrcp14<ssescalarmodesuffix>\t{%1, %2, %0|%0, %2, %1}"
+  "vrcp14<ssescalarmodesuffix>\t{%1, %2, %0|%0, %2, %<iptr>1}"
   [(set_attr "type" "sse")
    (set_attr "prefix" "evex")
    (set_attr "mode" "<MODE>")])
@@ -1583,7 +1583,7 @@
          (match_operand:VF_128 2 "register_operand" "v")
          (const_int 1)))]
   "TARGET_AVX512F"
-  "vrsqrt14<ssescalarmodesuffix>\t{%1, %2, %0|%0, %2, %1}"
+  "vrsqrt14<ssescalarmodesuffix>\t{%1, %2, %0|%0, %2, %<iptr>1}"
   [(set_attr "type" "sse")
    (set_attr "prefix" "evex")
    (set_attr "mode" "<MODE>")])
@@ -4276,7 +4276,7 @@
             (parallel [(const_int 0) (const_int 1)]))]
          UNSPEC_FIX_NOTRUNC))]
   "TARGET_AVX512DQ && TARGET_AVX512VL"
-  "vcvtps2qq\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
+  "vcvtps2qq\t{%1, %0<mask_operand2>|%0<mask_operand2>, %q1}"
   [(set_attr "type" "ssecvt")
    (set_attr "prefix" "evex")
    (set_attr "mode" "TI")])
@@ -4299,7 +4299,7 @@
             (parallel [(const_int 0) (const_int 1)]))]
          UNSPEC_UNSIGNED_FIX_NOTRUNC))]
   "TARGET_AVX512DQ && TARGET_AVX512VL"
-  "vcvtps2uqq\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
+  "vcvtps2uqq\t{%1, %0<mask_operand2>|%0<mask_operand2>, %q1}"
   [(set_attr "type" "ssecvt")
    (set_attr "prefix" "evex")
    (set_attr "mode" "TI")])
@@ -4974,7 +4974,7 @@
            (match_operand:V4SF 1 "nonimmediate_operand" "vm")
            (parallel [(const_int 0) (const_int 1)]))))]
   "TARGET_AVX512DQ && TARGET_AVX512VL"
-  "vcvttps2<fixsuffix>qq\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
+  "vcvttps2<fixsuffix>qq\t{%1, %0<mask_operand2>|%0<mask_operand2>, %q1}"
   [(set_attr "type" "ssecvt")
    (set_attr "prefix" "evex")
    (set_attr "mode" "TI")])
@@ -8944,7 +8944,7 @@
                    (const_int 12) (const_int 13)
                    (const_int 14) (const_int 15)]))))]
   "TARGET_AVX512VL"
-  "vpmov<trunsuffix>qb\t{%1, %0%{%2%}|%0%{%2%}, %1}"
+  "vpmov<trunsuffix>qb\t{%1, %0%{%2%}|%w0%{%2%}, %1}"
   [(set_attr "type" "ssemov")
    (set_attr "memory" "store")
    (set_attr "prefix" "evex")
@@ -9034,7 +9034,11 @@
                    (const_int 12) (const_int 13)
                    (const_int 14) (const_int 15)]))))]
   "TARGET_AVX512VL"
-  "vpmov<trunsuffix><pmov_suff_3>\t{%1, %0%{%2%}|%0%{%2%}, %1}"
+{
+  if (GET_MODE_SIZE (GET_MODE_INNER (<MODE>mode)) == 8)
+    return "vpmov<trunsuffix><pmov_suff_3>\t{%1, %0%{%2%}|%k0%{%2%}, %1}";
+  return "vpmov<trunsuffix><pmov_suff_3>\t{%1, %0%{%2%}|%0%{%2%}, %g1}";
+}
   [(set_attr "type" "ssemov")
    (set_attr "memory" "store")
    (set_attr "prefix" "evex")
@@ -9125,7 +9129,11 @@
                    (const_int 12) (const_int 13)
                    (const_int 14) (const_int 15)]))))]
   "TARGET_AVX512VL"
-  "vpmov<trunsuffix><pmov_suff_3>\t{%1, %0%{%2%}|%0%{%2%}, %1}"
+{
+  if (GET_MODE_SIZE (GET_MODE_INNER (<MODE>mode)) == 4)
+    return "vpmov<trunsuffix><pmov_suff_3>\t{%1, %0%{%2%}|%0%{%2%}, %g1}";
+  return "vpmov<trunsuffix><pmov_suff_3>\t{%1, %0%{%2%}|%0%{%2%}, %1}";
+}
   [(set_attr "type" "ssemov")
    (set_attr "memory" "store")
    (set_attr "prefix" "evex")
@@ -9219,7 +9227,11 @@
         (parallel [(const_int 4) (const_int 5)
                    (const_int 6) (const_int 7)]))))]
   "TARGET_AVX512VL"
-  "vpmov<trunsuffix><pmov_suff_4>\t{%1, %0%{%2%}|%0%{%2%}, %1}"
+{
+  if (GET_MODE_SIZE (GET_MODE_INNER (<MODE>mode)) == 4)
+    return "vpmov<trunsuffix><pmov_suff_4>\t{%1, %0%{%2%}|%0%{%2%}, %t1}";
+  return "vpmov<trunsuffix><pmov_suff_4>\t{%1, %0%{%2%}|%0%{%2%}, %g1}";
+}
   [(set_attr "type" "ssemov")
    (set_attr "memory" "store")
    (set_attr "prefix" "evex")
@@ -9294,7 +9306,7 @@
                    (const_int 4) (const_int 5)
                    (const_int 6) (const_int 7)]))))]
   "TARGET_AVX512VL"
-  "vpmov<trunsuffix>qw\t{%1, %0%{%2%}|%0%{%2%}, %1}"
+  "vpmov<trunsuffix>qw\t{%1, %0%{%2%}|%0%{%2%}, %g1}"
   [(set_attr "type" "ssemov")
    (set_attr "memory" "store")
    (set_attr "prefix" "evex")
@@ -9373,7 +9385,7 @@
         (match_dup 0)
         (parallel [(const_int 2) (const_int 3)]))))]
   "TARGET_AVX512VL"
-  "vpmov<trunsuffix>qd\t{%1, %0%{%2%}|%0%{%2%}, %1}"
+  "vpmov<trunsuffix>qd\t{%1, %0%{%2%}|%0%{%2%}, %t1}"
   [(set_attr "type" "ssemov")
    (set_attr "memory" "store")
    (set_attr "prefix" "evex")
@@ -9476,7 +9488,7 @@
                    (const_int 12) (const_int 13)
                    (const_int 14) (const_int 15)]))))]
   "TARGET_AVX512F"
-  "vpmov<trunsuffix>qb\t{%1, %0%{%2%}|%0%{%2%}, %1}"
+  "vpmov<trunsuffix>qb\t{%1, %0%{%2%}|%q0%{%2%}, %1}"
   [(set_attr "type" "ssemov")
    (set_attr "memory" "store")
    (set_attr "prefix" "evex")
@@ -12229,7 +12241,7 @@
                       (const_int 2) (const_int 3)]))
          (match_operand:<ssehalfvecmode> 2 "nonimmediate_operand" "vm")))]
   "TARGET_AVX512F"
-  "vinsert<shuffletype>64x4\t{$0x1, %2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2, $0x1}"
+  "vinsert<shuffletype>64x4\t{$0x1, %2, %1, %0<mask_operand3>|%0<mask_operand3>, %1, %2, 0x1}"
   [(set_attr "type" "sselog")
    (set_attr "length_immediate" "1")
    (set_attr "prefix" "evex")
@@ -17130,7 +17142,7 @@
            (match_operand:<ssexmmmode> 1 "nonimmediate_operand" "vm")
            (parallel [(const_int 0) (const_int 1)]))))]
   "TARGET_AVX512DQ"
-  "vbroadcast<shuffletype>32x2\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
+  "vbroadcast<shuffletype>32x2\t{%1, %0<mask_operand2>|%0<mask_operand2>, %q1}"
   [(set_attr "type" "ssemov")
    (set_attr "prefix_extra" "1")
    (set_attr "prefix" "evex")
@@ -18544,7 +18556,11 @@
          UNSPEC_GATHER))
    (clobber (match_scratch:QI 2 "=&Yk"))]
   "TARGET_AVX512F"
-  "v<sseintprefix>gatherq<ssemodesuffix>\t{%6, %1%{%2%}|%1%{%2%}, %g6}"
+{
+  if (GET_MODE_SIZE (GET_MODE_INNER (<MODE>mode)) == 4)
+    return "v<sseintprefix>gatherq<ssemodesuffix>\t{%6, %1%{%2%}|%1%{%2%}, %t6}";
+  return "v<sseintprefix>gatherq<ssemodesuffix>\t{%6, %1%{%2%}|%1%{%2%}, %g6}";
+}
   [(set_attr "type" "ssemov")
    (set_attr "prefix" "evex")
    (set_attr "mode" "<sseinsnmode>")])
@@ -18644,7 +18660,11 @@
          UNSPEC_SCATTER))
    (clobber (match_scratch:QI 1 "=&Yk"))]
   "TARGET_AVX512F"
-  "v<sseintprefix>scatterq<ssemodesuffix>\t{%3, %5%{%1%}|%5%{%1%}, %3}"
+{
+  if (GET_MODE_SIZE (GET_MODE_INNER (<MODE>mode)) == 8)
+    return "v<sseintprefix>scatterq<ssemodesuffix>\t{%3, %5%{%1%}|%5%{%1%}, %3}";
+  return "v<sseintprefix>scatterq<ssemodesuffix>\t{%3, %5%{%1%}|%t5%{%1%}, %3}";
+}
   [(set_attr "type" "ssemov")
    (set_attr "prefix" "evex")
    (set_attr "mode" "<sseinsnmode>")])