alpha: widening multiply pattern

        * config/alpha/alpha.md (umulditi3): New.

From-SVN: r195668

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index dd9224dd98668d0e865a44153e02c3f75986ee7a..1c66228e1955543daa5f95ed7aa1010d6ae5368e 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -3,6 +3,8 @@
        * config/rs6000/rs6000.md (smulditi3): New.
        (umulditi3): New.
 
+       * config/alpha/alpha.md (umulditi3): New.
+
 2013-02-01  David Edelsohn  <dje.gcc@gmail.com>
 
        * config/rs6000/xcoff.h (ASM_OUTPUT_ALIGNED_COMMON): Use floor_log2.

diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md
index f7f9397b865f48143ece67849756f6c287316934..439752780a0b6755f9dadf19e7252c91edc52f86 100644 (file)
--- a/gcc/config/alpha/alpha.md
+++ b/gcc/config/alpha/alpha.md
@@ -719,6 +719,21 @@
   "umulh %1,%2,%0"
   [(set_attr "type" "imul")
    (set_attr "opsize" "udi")])
+
+(define_expand "umulditi3"
+  [(set (match_operand:TI 0 "register_operand")
+       (mult:TI
+        (zero_extend:TI (match_operand:DI 1 "reg_no_subreg_operand"))
+        (zero_extend:TI (match_operand:DI 2 "reg_no_subreg_operand"))))]
+  ""
+{
+  rtx l = gen_reg_rtx (DImode), h = gen_reg_rtx (DImode);
+  emit_insn (gen_muldi3 (l, operands[1], operands[2]));
+  emit_insn (gen_umuldi3_highpart (h, operands[1], operands[2]));
+  emit_move_insn (gen_lowpart (DImode, operands[0]), l);
+  emit_move_insn (gen_highpart (DImode, operands[0]), h);
+  DONE;
+})
 \f
 ;; The divide and remainder operations take their inputs from r24 and
 ;; r25, put their output in r27, and clobber r23 and r28 on all systems.