whoops must not reset last_op_svstate except when out of SVP64 mode

diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py
index 96461945c7c53ae8cfc6ffc6f97f4b14aa052cc9..d57a8fc12387dfa63e231ec952ad6a59d169f823 100644 (file)
--- a/src/openpower/decoder/isa/caller.py
+++ b/src/openpower/decoder/isa/caller.py
@@ -1154,6 +1154,7 @@ class ISACaller:
         # using pre-arranged schedule.  all of this is awful but it is a
         # start.  next job will be to put the proper activation in place
         yield self.dec2.remap_active.eq(1 if self.last_op_svshape else 0)
+        yield Settle()
         if self.is_svp64_mode and self.last_op_svshape:
             # get four SVSHAPEs. here we are hard-coding
             # SVSHAPE0 to FRT, SVSHAPE1 to FRA, SVSHAPE2 to FRC and
@@ -1460,13 +1461,13 @@ class ISACaller:
                     # TODO: set CR0 (if Rc=1) based on end
         elif self.is_svp64_mode:
             yield from self.svstate_post_inc()
-
-        # XXX only in non-SVP64 mode!
-        # record state of whether the current operation was an svshape,
-        # to be able to know if it should apply in the next instruction.
-        # also (if going to use this instruction) should disable ability
-        # to interrupt in between. sigh.
-        self.last_op_svshape = asmop == 'svremap'
+        else:
+            # XXX only in non-SVP64 mode!
+            # record state of whether the current operation was an svshape,
+            # to be able to know if it should apply in the next instruction.
+            # also (if going to use this instruction) should disable ability
+            # to interrupt in between. sigh.
+            self.last_op_svshape = asmop == 'svremap'
 
         self.update_pc_next()