add DDR controller interface
authorLuke Leighton <lkcl@lkcl.net>
Tue, 27 Feb 2018 01:18:18 +0000 (01:18 +0000)
committerLuke Leighton <lkcl@lkcl.net>
Tue, 27 Feb 2018 01:18:18 +0000 (01:18 +0000)
shakti/m_class/DDR.mdwn [new file with mode: 0644]

diff --git a/shakti/m_class/DDR.mdwn b/shakti/m_class/DDR.mdwn
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+# DDR (DRAM) Controller and PHY
+
+* <https://github.com/enjoy-digital/litedram> - controller inc. DDR3 / LPDDR3