ARM: Make VFP load/store and 64 bit move decode correspond with CP10 and CP11.

diff --git a/src/arch/arm/isa/decoder/arm.isa b/src/arch/arm/isa/decoder/arm.isa
index 477a1ec6009de90f56248612cda609f3d0a9e618..31456dfc63003f624619b6c463c7ad68aa3ca973 100644 (file)
--- a/src/arch/arm/isa/decoder/arm.isa
+++ b/src/arch/arm/isa/decoder/arm.isa
@@ -123,7 +123,7 @@ format DataOp {
         1: ArmBlBlxImm::armBlBlxImm();
     }
     0x6: decode CPNUM {
-        0xb: ExtensionRegLoadStore::extensionRegLoadStore();
+        0xa, 0xb: ExtensionRegLoadStore::extensionRegLoadStore();
     }
     0x7: decode OPCODE_24 {
         0: decode OPCODE_4 {