GL 4.6, GLSL 4.60
GL_ARB_gl_spirv in progress (Nicolai Hähnle, Ian Romanick)
- GL_ARB_indirect_parameters DONE (i965/gen7+, nvc0, radeonsi)
+ GL_ARB_indirect_parameters DONE (i965/gen7+, nvc0, radeonsi, virgl)
GL_ARB_pipeline_statistics_query DONE (i965, nvc0, r600, radeonsi, llvmpipe, softpipe, swr)
GL_ARB_polygon_offset_clamp DONE (freedreno, i965, nv50, nvc0, r600, radeonsi, llvmpipe, swr, virgl)
GL_ARB_shader_atomic_counter_ops DONE (freedreno/a5xx+, i965/gen7+, nvc0, r600, radeonsi, softpipe, virgl)
#define VIRGL_CAP_FAKE_FP64 (1 << 19)
#define VIRGL_CAP_BIND_COMMAND_ARGS (1 << 20)
#define VIRGL_CAP_MULTI_DRAW_INDIRECT (1 << 21)
+#define VIRGL_CAP_INDIRECT_PARAMS (1 << 22)
#define VIRGL_CAP_TRANSFORM_FEEDBACK3 (1 << 23)
/* virgl bind flags - these are compatible with mesa 10.5 gallium.
return (vscreen->caps.caps.v1.max_samples == 1) ? 1 : 0;
case PIPE_CAP_MULTI_DRAW_INDIRECT:
return !!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_MULTI_DRAW_INDIRECT);
+ case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
+ return !!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_INDIRECT_PARAMS);
case PIPE_CAP_TEXTURE_GATHER_SM5:
case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
- case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
case PIPE_CAP_CLIP_HALFZ:
case PIPE_CAP_VERTEXID_NOBASE:
case PIPE_CAP_MULTISAMPLE_Z_RESOLVE: