r600g: inline r600_context_draw_opaque_count

diff --git a/src/gallium/drivers/r600/r600.h b/src/gallium/drivers/r600/r600.h
index 0e3fde71106ac0f224db5c89c7ea63103fe08744..14993569d1798726f652a125e0e391d8aae9b65f 100644 (file)
--- a/src/gallium/drivers/r600/r600.h
+++ b/src/gallium/drivers/r600/r600.h
@@ -204,7 +204,6 @@ void r600_flush_framebuffer(struct r600_context *ctx, bool flush_now);
 
 void r600_context_streamout_begin(struct r600_context *ctx);
 void r600_context_streamout_end(struct r600_context *ctx);
-void r600_context_draw_opaque_count(struct r600_context *ctx, struct r600_so_target *t);
 void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw, boolean count_draw_in);
 void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block, unsigned pkt_flags);
 

diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index 7c0637e110e923db589d177ad049ad8bbc84a526..4f0023c6717809df44cd091aa1a32cec9807dcfa 100644 (file)
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -1368,30 +1368,3 @@ void r600_context_streamout_end(struct r600_context *ctx)
        }
 #endif
 }
-
-void r600_context_draw_opaque_count(struct r600_context *ctx, struct r600_so_target *t)
-{
-       struct radeon_winsys_cs *cs = ctx->cs;
-       uint64_t va = r600_resource_va(&ctx->screen->screen,
-                                      (void*)t->filled_size);
-
-       r600_need_cs_space(ctx, 14 + 21, TRUE);
-
-       cs->buf[cs->cdw++] = PKT3(PKT3_SET_CONTEXT_REG, 1, 0);
-       cs->buf[cs->cdw++] = (R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET - R600_CONTEXT_REG_OFFSET) >> 2;
-       cs->buf[cs->cdw++] = 0;
-
-       cs->buf[cs->cdw++] = PKT3(PKT3_SET_CONTEXT_REG, 1, 0);
-       cs->buf[cs->cdw++] = (R_028B30_VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE - R600_CONTEXT_REG_OFFSET) >> 2;
-       cs->buf[cs->cdw++] = t->stride_in_dw;
-
-       cs->buf[cs->cdw++] = PKT3(PKT3_COPY_DW, 4, 0);
-       cs->buf[cs->cdw++] = COPY_DW_SRC_IS_MEM | COPY_DW_DST_IS_REG;
-       cs->buf[cs->cdw++] = va & 0xFFFFFFFFUL;     /* src address lo */
-       cs->buf[cs->cdw++] = (va >> 32UL) & 0xFFUL; /* src address hi */
-       cs->buf[cs->cdw++] = R_028B2C_VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE >> 2; /* dst register */
-       cs->buf[cs->cdw++] = 0; /* unused */
-
-       cs->buf[cs->cdw++] = PKT3(PKT3_NOP, 0, 0);
-       cs->buf[cs->cdw++] = r600_context_bo_reloc(ctx, t->filled_size, RADEON_USAGE_READ);
-}

diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index 89549f91e4b2d1da53b0d31817e7cbeb5e14978f..d114093fc8d1783c5f7e75d43433fdf9cfbc3a93 100644 (file)
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -1028,9 +1028,6 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
                }
        } else {
                info.index_bias = info.start;
-               if (info.count_from_stream_output) {
-                       r600_context_draw_opaque_count(rctx, (struct r600_so_target*)info.count_from_stream_output);
-               }
        }
 
        if (rctx->vgt.id != R600_PIPE_STATE_VGT) {
@@ -1073,7 +1070,9 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
        r600_context_pipe_state_set(rctx, &rctx->vgt);
 
        /* Emit states (the function expects that we emit at most 17 dwords here). */
-       r600_need_cs_space(rctx, 0, TRUE);
+       r600_need_cs_space(rctx,
+                          !info.indexed && info.count_from_stream_output ? 14 : 0,
+                          TRUE);
 
        LIST_FOR_EACH_ENTRY_SAFE(state, next_state, &rctx->dirty_states, head) {
                r600_emit_atom(rctx, state);
@@ -1107,6 +1106,24 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
                cs->buf[cs->cdw++] = PKT3(PKT3_NOP, 0, rctx->predicate_drawing);
                cs->buf[cs->cdw++] = r600_context_bo_reloc(rctx, (struct r600_resource*)ib.buffer, RADEON_USAGE_READ);
        } else {
+               if (info.count_from_stream_output) {
+                       struct r600_so_target *t = (struct r600_so_target*)info.count_from_stream_output;
+                       uint64_t va = r600_resource_va(&rctx->screen->screen, (void*)t->filled_size);
+
+                       r600_write_context_reg(cs, R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET, 0);
+                       r600_write_context_reg(cs, R_028B30_VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE, t->stride_in_dw);
+
+                       cs->buf[cs->cdw++] = PKT3(PKT3_COPY_DW, 4, 0);
+                       cs->buf[cs->cdw++] = COPY_DW_SRC_IS_MEM | COPY_DW_DST_IS_REG;
+                       cs->buf[cs->cdw++] = va & 0xFFFFFFFFUL;     /* src address lo */
+                       cs->buf[cs->cdw++] = (va >> 32UL) & 0xFFUL; /* src address hi */
+                       cs->buf[cs->cdw++] = R_028B2C_VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE >> 2; /* dst register */
+                       cs->buf[cs->cdw++] = 0; /* unused */
+
+                       cs->buf[cs->cdw++] = PKT3(PKT3_NOP, 0, 0);
+                       cs->buf[cs->cdw++] = r600_context_bo_reloc(rctx, t->filled_size, RADEON_USAGE_READ);
+               }
+
                cs->buf[cs->cdw++] = PKT3(PKT3_DRAW_INDEX_AUTO, 1, rctx->predicate_drawing);
                cs->buf[cs->cdw++] = info.count;
                cs->buf[cs->cdw++] = V_0287F0_DI_SRC_SEL_AUTO_INDEX |