radeonsi: simplify computation of tessellation offchip buffers

This is overly cautious, but better safe than sorry.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index f1170be72ef7115c45d4596848ccfde4374cae60..9bcf2e08163073c586c81ace1e2e9f908c153ca7 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -2942,7 +2942,10 @@ static void si_init_tess_factor_ring(struct si_context *sctx)
        bool double_offchip_buffers = sctx->b.chip_class >= CIK &&
                                      sctx->b.family != CHIP_CARRIZO &&
                                      sctx->b.family != CHIP_STONEY;
-       unsigned max_offchip_buffers_per_se = double_offchip_buffers ? 128 : 64;
+       /* This must be one less than the maximum number due to a hw limitation.
+        * Various hardware bugs in SI, CIK, and GFX9 need this.
+        */
+       unsigned max_offchip_buffers_per_se = double_offchip_buffers ? 127 : 63;
        unsigned max_offchip_buffers = max_offchip_buffers_per_se *
                                       sctx->screen->b.info.max_se;
        unsigned offchip_granularity;
@@ -2959,20 +2962,6 @@ static void si_init_tess_factor_ring(struct si_context *sctx)
                break;
        }
 
-       switch (sctx->b.chip_class) {
-       case SI:
-               max_offchip_buffers = MIN2(max_offchip_buffers, 126);
-               break;
-       case CIK:
-       case VI:
-       case GFX9:
-               max_offchip_buffers = MIN2(max_offchip_buffers, 508);
-               break;
-       default:
-               assert(0);
-               return;
-       }
-
        assert(!sctx->tf_ring);
        /* Use 64K alignment for both rings, so that we can pass the address
         * to shaders as one SGPR containing bits [16:47].