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diff --git a/openpower/sv/cr_ops.mdwn b/openpower/sv/cr_ops.mdwn
index 7eb890f090f832b06d6bd06a37e0131e16927f71..f3983a22086bbd0fd75bdf036ce749a81ae19e3f 100644 (file)
--- a/openpower/sv/cr_ops.mdwn
+++ b/openpower/sv/cr_ops.mdwn
@@ -3,6 +3,7 @@
 Links:
 
 * <https://bugs.libre-soc.org/show_bug.cgi?id=687>
+* [[svp64]]
 
 Condition Register Fields are only 4 bits wide: this presents some
 interesting conceptual challenges for SVP64, particularly with respect to element