freedreno/ir3: pass variant to postsched
authorRob Clark <robdclark@chromium.org>
Sat, 13 Jun 2020 16:23:57 +0000 (09:23 -0700)
committerMarge Bot <eric+marge@anholt.net>
Thu, 18 Jun 2020 02:46:28 +0000 (02:46 +0000)
Prep for the next patch.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5458>

src/freedreno/ir3/ir3.h
src/freedreno/ir3/ir3_compiler_nir.c
src/freedreno/ir3/ir3_postsched.c

index bdfce559aab5c89efce057cd51bb5b7a12b1e169..c0d46eea8f537be5cf460e81bd46cb1cf50c61db 100644 (file)
@@ -1312,7 +1312,7 @@ bool ir3_sched_add_deps(struct ir3 *ir);
 int ir3_sched(struct ir3 *ir);
 
 struct ir3_context;
-bool ir3_postsched(struct ir3 *ir);
+bool ir3_postsched(struct ir3 *ir, struct ir3_shader_variant *v);
 
 bool ir3_a6xx_fixup_atomic_dests(struct ir3 *ir, struct ir3_shader_variant *so);
 
index 1ad4149d4517a109450b30e83dc86e11aed4fc19..91ef00b9c92a32f80cfad0820df4eac2f3c63be5 100644 (file)
@@ -3710,7 +3710,7 @@ ir3_compile_shader_nir(struct ir3_compiler *compiler,
                goto out;
        }
 
-       IR3_PASS(ir, ir3_postsched);
+       IR3_PASS(ir, ir3_postsched, so);
 
        if (compiler->gpu_id >= 600) {
                IR3_PASS(ir, ir3_a6xx_fixup_atomic_dests, so);
index fd36fdc0cdd7e740abaf79731f5e6347ac5fdb41..ad16526cd507bcc2cb961435ad2b18dfb525bd47 100644 (file)
@@ -53,6 +53,8 @@
 struct ir3_postsched_ctx {
        struct ir3 *ir;
 
+       struct ir3_shader_variant *v;
+
        void *mem_ctx;
        struct ir3_block *block;           /* the current block */
        struct dag *dag;
@@ -701,10 +703,11 @@ cleanup_self_movs(struct ir3 *ir)
 }
 
 bool
-ir3_postsched(struct ir3 *ir)
+ir3_postsched(struct ir3 *ir, struct ir3_shader_variant *v)
 {
        struct ir3_postsched_ctx ctx = {
                        .ir = ir,
+                       .v  = v,
        };
 
        ir3_remove_nops(ir);