i386: Emulate MMX <any_logic><mode>3 with SSE

Emulate MMX <any_logic><mode>3 with SSE.  Only SSE register source
operand is allowed.

	PR target/89021
	* config/i386/mmx.md (any_logic:mmx_<code><mode>3): Also allow
	TARGET_MMX_WITH_SSE.
	(any_logic:<code><mode>3): New.
	(any_logic:*mmx_<code><mode>3): Also allow TARGET_MMX_WITH_SSE.
	Add SSE support.

From-SVN: r271222

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ecf9f7b98a5dbbc50fe3cf8d9f031f2c54378e53..7bee15062230fad92111a5224da4e4799caabd84 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR target/89021
+       * config/i386/mmx.md (any_logic:mmx_<code><mode>3): Also allow
+       TARGET_MMX_WITH_SSE.
+       (any_logic:<code><mode>3): New.
+       (any_logic:*mmx_<code><mode>3): Also allow TARGET_MMX_WITH_SSE.
+       Add SSE support.
+
 2019-05-15  H.J. Lu  <hongjiu.lu@intel.com>
 
        PR target/89021

diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index 73110b5e43c5d0c5eb3b3a0263145be2d6fd964a..058d805de664dc05b2ad87dced0bb0a53cd94026 100644 (file)
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -1086,20 +1086,33 @@
 (define_expand "mmx_<code><mode>3"
   [(set (match_operand:MMXMODEI 0 "register_operand")
        (any_logic:MMXMODEI
-         (match_operand:MMXMODEI 1 "nonimmediate_operand")
-         (match_operand:MMXMODEI 2 "nonimmediate_operand")))]
-  "TARGET_MMX"
+         (match_operand:MMXMODEI 1 "register_mmxmem_operand")
+         (match_operand:MMXMODEI 2 "register_mmxmem_operand")))]
+  "TARGET_MMX || TARGET_MMX_WITH_SSE"
+  "ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
+
+(define_expand "<code><mode>3"
+  [(set (match_operand:MMXMODEI 0 "register_operand")
+       (any_logic:MMXMODEI
+         (match_operand:MMXMODEI 1 "register_operand")
+         (match_operand:MMXMODEI 2 "register_operand")))]
+  "TARGET_MMX_WITH_SSE"
   "ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
 
 (define_insn "*mmx_<code><mode>3"
-  [(set (match_operand:MMXMODEI 0 "register_operand" "=y")
+  [(set (match_operand:MMXMODEI 0 "register_operand" "=y,x,Yv")
         (any_logic:MMXMODEI
-         (match_operand:MMXMODEI 1 "nonimmediate_operand" "%0")
-         (match_operand:MMXMODEI 2 "nonimmediate_operand" "ym")))]
-  "TARGET_MMX && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
-  "p<logic>\t{%2, %0|%0, %2}"
-  [(set_attr "type" "mmxadd")
-   (set_attr "mode" "DI")])
+         (match_operand:MMXMODEI 1 "register_mmxmem_operand" "%0,0,Yv")
+         (match_operand:MMXMODEI 2 "register_mmxmem_operand" "ym,x,Yv")))]
+  "(TARGET_MMX || TARGET_MMX_WITH_SSE)
+   && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
+  "@
+   p<logic>\t{%2, %0|%0, %2}
+   p<logic>\t{%2, %0|%0, %2}
+   vp<logic>\t{%2, %1, %0|%0, %1, %2}"
+  [(set_attr "mmx_isa" "native,x64_noavx,x64_avx")
+   (set_attr "type" "mmxadd,sselog,sselog")
+   (set_attr "mode" "DI,TI,TI")])
 
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