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bring ulx3s frequency down to 12.5 mhz ulx3s
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 12 Feb 2022 15:55:27 +0000 (15:55 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 12 Feb 2022 15:55:27 +0000 (15:55 +0000)
Makefile patch | blob | history

diff --git a/Makefile b/Makefile
index b939620f847f6285891512c7c77c7b4865f276ef..43f5d88553e1c30b9a037528cf2fa4e4ea904493 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -162,7 +162,7 @@ endif
 ifeq ($(FPGA_TARGET), ULX3S)
 RESET_LOW=true
 CLK_INPUT=25000000
-CLK_FREQUENCY=25000000
+CLK_FREQUENCY=12500000
 LPF=constraints/ulx3s.lpf
 PACKAGE=CABGA381
 NEXTPNR_FLAGS=--85k --freq 25