From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 18 Feb 2019 18:18:48 +0000 (+0000)
Subject: product in multiply, not tot (was from add)
X-Git-Tag: ls180-24jan2020~1894
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;ds=sidebyside;h=924c3fee2f21440de0fb11b30068c85a5db80a9a;p=ieee754fpu.git

product in multiply, not tot (was from add)
---

diff --git a/src/add/fmul.py b/src/add/fmul.py
index 65b74bff..4e136f17 100644
--- a/src/add/fmul.py
+++ b/src/add/fmul.py
@@ -24,7 +24,8 @@ class FPMUL(FPBase):
         b = FPNum(self.width, False)
         z = FPNum(self.width, False)
 
-        tot = Signal(28)     # sticky/round/guard bits, 23 result, 1 overflow
+        mw = (self.m_width)*2 - 1 + 3 # sticky/round/guard bits + (2*mant) - 1
+        product = Signal(mw)
 
         of = Overflow()