From: Eddie Hung <eddie@fpgeh.com>
Date: Tue, 27 Aug 2019 16:24:32 +0000 (-0700)
Subject: Revert to using clean
X-Git-Tag: working-ls180~1095^2~1
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=00387f39277ab817b3b17e72b59793e6d5dfcde8;p=yosys.git

Revert to using clean
---

diff --git a/tests/sat/initval.ys b/tests/sat/initval.ys
index 3d88aa971..2079d2f34 100644
--- a/tests/sat/initval.ys
+++ b/tests/sat/initval.ys
@@ -1,4 +1,4 @@
 read_verilog -sv initval.v
-proc;
+proc;;
 
 sat -seq 10 -prove-asserts