From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 31 Jul 2020 16:30:56 +0000 (+0100)
Subject: restrict external port list further in test_issuer
X-Git-Tag: semi_working_ecp5~478
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=006e364df732d4cff95ddcf948889d5fda8a561a;p=soc.git

restrict external port list further in test_issuer
---

diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py
index 854a5e66..a273fd16 100644
--- a/src/soc/simple/issuer.py
+++ b/src/soc/simple/issuer.py
@@ -221,8 +221,8 @@ class TestIssuer(Elaboratable):
                                     self.busy_o,
                                     self.halted_o,
                                     ] + \
-                self.imem.ports() + \
-                self.core.l0.cmpi.lsmem.lsi.ports()
+                list(self.imem.ibus.fields.values()) + \
+                list(self.core.l0.cmpi.lsmem.lsi.dbus.fields.values())
 
 
     def ports(self):