From: Clifford Wolf Date: Fri, 19 Apr 2019 21:37:11 +0000 (+0200) Subject: Improvements in pmux2shiftx X-Git-Tag: yosys-0.9~186^2~5 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0070184ea9dea56d1dfd8268035bc01a3e340add;p=yosys.git Improvements in pmux2shiftx Signed-off-by: Clifford Wolf --- diff --git a/passes/opt/pmux2shiftx.cc b/passes/opt/pmux2shiftx.cc index daa73b0b8..d0f41cb07 100644 --- a/passes/opt/pmux2shiftx.cc +++ b/passes/opt/pmux2shiftx.cc @@ -149,6 +149,7 @@ struct Pmux2ShiftxPass : public Pass { dict> seldb; + SigSpec B = cell->getPort("\\B"); SigSpec S = sigmap(cell->getPort("\\S")); for (int i = 0; i < GetSize(S); i++) { @@ -168,15 +169,6 @@ struct Pmux2ShiftxPass : public Pass { SigSpec updated_S = cell->getPort("\\S"); SigSpec updated_B = cell->getPort("\\B"); - #if 1 - for (auto &it : seldb) { - string msg = stringf("seldb: %s ->", log_signal(it.first)); - for (int i : it.second) - msg += stringf(" %d(%s)", i, log_signal(eqdb.at(S[i]).second)); - log(" %s\n", msg.c_str()); - } - #endif - while (!seldb.empty()) { // pick the largest entry in seldb @@ -319,7 +311,8 @@ struct Pmux2ShiftxPass : public Pass { min_choice = std::min(min_choice, new_c.as_int()); max_choice = std::max(max_choice, new_c.as_int()); - log(" %s -> %s -> %s\n", log_signal(old_c), log_signal(new_c_before_xor), log_signal(new_c)); + log(" %3d: %s -> %s -> %s: %s\n", it.second, log_signal(old_c), log_signal(new_c_before_xor), + log_signal(new_c), log_signal(B.extract(it.second*width, width))); } int range_density = 100*GetSize(choices) / (max_choice-min_choice+1); @@ -338,9 +331,9 @@ struct Pmux2ShiftxPass : public Pass { Const offset(State::S0, GetSize(sig)); if (absolute_density < non_offset_percentage && range_density >= offset_percentage) { - log(" using offset method.\n"); - offset = Const(min_choice, GetSize(sig)); + log(" offset: %s\n", log_signal(offset)); + min_choice -= offset.as_int(); max_choice -= offset.as_int(); @@ -377,7 +370,7 @@ struct Pmux2ShiftxPass : public Pass { for (auto &it : perm_choices) { int position = it.first.as_int()*extwidth; int data_index = it.second; - data.replace(position, cell->getPort("\\B").extract(data_index*width, width)); + data.replace(position, B.extract(data_index*width, width)); updated_S[data_index] = State::S0; updated_B.replace(data_index*width, SigSpec(State::Sx, width)); } diff --git a/tests/various/pmux2shiftx.v b/tests/various/pmux2shiftx.v index ac61c5c0e..fec84187b 100644 --- a/tests/various/pmux2shiftx.v +++ b/tests/various/pmux2shiftx.v @@ -1,28 +1,34 @@ module pmux2shiftx_test ( input [2:0] S1, input [5:0] S2, - input [9:0] A, B, C, D, D, E, F, - input [9:0] G, H, I, J, K, L, M, N, + input [1:0] S3, + input [9:0] A, B, C, D, D, E, F, G, H, + input [9:0] I, J, K, L, M, N, O, P, Q, output reg [9:0] X ); always @* begin case (S1) - 3'd0: X = A; - 3'd1: X = B; - 3'd2: X = C; - 3'd3: X = D; - 3'd4: X = E; - 3'd5: X = F; - 3'd6: X = G; - 3'd7: X = H; + 3'd 0: X = A; + 3'd 1: X = B; + 3'd 2: X = C; + 3'd 3: X = D; + 3'd 4: X = E; + 3'd 5: X = F; + 3'd 6: X = G; + 3'd 7: X = H; endcase case (S2) - 6'd46: X = I; - 6'd47: X = J; - 6'd48: X = K; - 6'd52: X = L; - 6'd53: X = M; - 6'd54: X = N; + 6'd 45: X = I; + 6'd 47: X = J; + 6'd 49: X = K; + 6'd 55: X = L; + 6'd 57: X = M; + 6'd 59: X = N; + endcase + case (S3) + 2'd 1: X = O; + 2'd 2: X = P; + 2'd 3: X = Q; endcase end endmodule diff --git a/tests/various/pmux2shiftx.ys b/tests/various/pmux2shiftx.ys index 16618ac0a..f5e83171c 100644 --- a/tests/various/pmux2shiftx.ys +++ b/tests/various/pmux2shiftx.ys @@ -2,13 +2,17 @@ read_verilog pmux2shiftx.v prep design -save gold -pmux2shiftx +pmux2shiftx -density 70 50 + opt + +stat # show -width -select -assert-count 1 t:$mux -select -assert-count 1 t:$shift -select -assert-count 2 t:$shiftx select -assert-count 1 t:$sub +select -assert-count 2 t:$mux +select -assert-count 2 t:$shift +select -assert-count 3 t:$shiftx + design -stash gate design -import gold -as gold