From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Thu, 26 Feb 2015 08:41:47 +0000 (+0100)
Subject: liteeth: fix import (from liteeth --> from misoclib.liteeth)
X-Git-Tag: 24jan2021_ls180~2601
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=00862a383ca0437eb50f17a15df7d5366dd4048b;p=litex.git

liteeth: fix import (from liteeth --> from misoclib.liteeth)
---

diff --git a/misoclib/liteeth/core/__init__.py b/misoclib/liteeth/core/__init__.py
index 4d9b7147..642dcb29 100644
--- a/misoclib/liteeth/core/__init__.py
+++ b/misoclib/liteeth/core/__init__.py
@@ -1,10 +1,10 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.mac import LiteEthMAC
-from liteeth.core.arp import LiteEthARP
-from liteeth.core.ip import LiteEthIP
-from liteeth.core.udp import LiteEthUDP
-from liteeth.core.icmp import LiteEthICMP
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.mac import LiteEthMAC
+from misoclib.liteeth.core.arp import LiteEthARP
+from misoclib.liteeth.core.ip import LiteEthIP
+from misoclib.liteeth.core.udp import LiteEthUDP
+from misoclib.liteeth.core.icmp import LiteEthICMP
 
 class LiteEthIPCore(Module, AutoCSR):
 	def __init__(self, phy, mac_address, ip_address, clk_freq):
diff --git a/misoclib/liteeth/core/arp/__init__.py b/misoclib/liteeth/core/arp/__init__.py
index 638505c3..82f4fc77 100644
--- a/misoclib/liteeth/core/arp/__init__.py
+++ b/misoclib/liteeth/core/arp/__init__.py
@@ -1,7 +1,7 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.generic.depacketizer import LiteEthDepacketizer
-from liteeth.generic.packetizer import LiteEthPacketizer
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
+from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
 
 _arp_table_layout = [
 		("reply", 1),
diff --git a/misoclib/liteeth/core/etherbone/__init__.py b/misoclib/liteeth/core/etherbone/__init__.py
index 78f3d738..09ffcb60 100644
--- a/misoclib/liteeth/core/etherbone/__init__.py
+++ b/misoclib/liteeth/core/etherbone/__init__.py
@@ -1,11 +1,11 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.generic.arbiter import Arbiter
-from liteeth.generic.dispatcher import Dispatcher
-from liteeth.core.etherbone.packet import *
-from liteeth.core.etherbone.probe import *
-from liteeth.core.etherbone.record import *
-from liteeth.core.etherbone.wishbone import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.generic.arbiter import Arbiter
+from misoclib.liteeth.generic.dispatcher import Dispatcher
+from misoclib.liteeth.core.etherbone.packet import *
+from misoclib.liteeth.core.etherbone.probe import *
+from misoclib.liteeth.core.etherbone.record import *
+from misoclib.liteeth.core.etherbone.wishbone import *
 
 class LiteEthEtherbone(Module):
 	def __init__(self, udp, udp_port):
diff --git a/misoclib/liteeth/core/etherbone/packet.py b/misoclib/liteeth/core/etherbone/packet.py
index 22f72c5a..79a6cd7c 100644
--- a/misoclib/liteeth/core/etherbone/packet.py
+++ b/misoclib/liteeth/core/etherbone/packet.py
@@ -1,7 +1,7 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.generic.depacketizer import LiteEthDepacketizer
-from liteeth.generic.packetizer import LiteEthPacketizer
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
+from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
 
 class LiteEthEtherbonePacketPacketizer(LiteEthPacketizer):
 	def __init__(self):
diff --git a/misoclib/liteeth/core/etherbone/probe.py b/misoclib/liteeth/core/etherbone/probe.py
index 04eb9f6a..465ced5f 100644
--- a/misoclib/liteeth/core/etherbone/probe.py
+++ b/misoclib/liteeth/core/etherbone/probe.py
@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthEtherboneProbe(Module):
 	def __init__(self):
diff --git a/misoclib/liteeth/core/etherbone/record.py b/misoclib/liteeth/core/etherbone/record.py
index 77bc0378..db0d6d52 100644
--- a/misoclib/liteeth/core/etherbone/record.py
+++ b/misoclib/liteeth/core/etherbone/record.py
@@ -1,7 +1,7 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.generic.depacketizer import LiteEthDepacketizer
-from liteeth.generic.packetizer import LiteEthPacketizer
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
+from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
 
 class LiteEthEtherboneRecordPacketizer(LiteEthPacketizer):
 	def __init__(self):
diff --git a/misoclib/liteeth/core/etherbone/wishbone.py b/misoclib/liteeth/core/etherbone/wishbone.py
index 2f5b1762..4d3f04cc 100644
--- a/misoclib/liteeth/core/etherbone/wishbone.py
+++ b/misoclib/liteeth/core/etherbone/wishbone.py
@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 from migen.bus import wishbone
 
 class LiteEthEtherboneWishboneMaster(Module):
diff --git a/misoclib/liteeth/core/icmp/__init__.py b/misoclib/liteeth/core/icmp/__init__.py
index 0af3b624..611d8482 100644
--- a/misoclib/liteeth/core/icmp/__init__.py
+++ b/misoclib/liteeth/core/icmp/__init__.py
@@ -1,7 +1,7 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.generic.depacketizer import LiteEthDepacketizer
-from liteeth.generic.packetizer import LiteEthPacketizer
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
+from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
 
 class LiteEthICMPPacketizer(LiteEthPacketizer):
 	def __init__(self):
diff --git a/misoclib/liteeth/core/ip/__init__.py b/misoclib/liteeth/core/ip/__init__.py
index 4e24f186..ca7bbf31 100644
--- a/misoclib/liteeth/core/ip/__init__.py
+++ b/misoclib/liteeth/core/ip/__init__.py
@@ -1,9 +1,9 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.core.ip.checksum import *
-from liteeth.core.ip.crossbar import *
-from liteeth.generic.depacketizer import LiteEthDepacketizer
-from liteeth.generic.packetizer import LiteEthPacketizer
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.core.ip.checksum import *
+from misoclib.liteeth.core.ip.crossbar import *
+from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
+from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
 
 class LiteEthIPV4Packetizer(LiteEthPacketizer):
 	def __init__(self):
diff --git a/misoclib/liteeth/core/ip/checksum.py b/misoclib/liteeth/core/ip/checksum.py
index f0e187e6..f6371c42 100644
--- a/misoclib/liteeth/core/ip/checksum.py
+++ b/misoclib/liteeth/core/ip/checksum.py
@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthIPV4Checksum(Module):
 	def __init__(self, words_per_clock_cycle=1, skip_checksum=False):
diff --git a/misoclib/liteeth/core/ip/crossbar.py b/misoclib/liteeth/core/ip/crossbar.py
index 19e88b2e..a49ee14e 100644
--- a/misoclib/liteeth/core/ip/crossbar.py
+++ b/misoclib/liteeth/core/ip/crossbar.py
@@ -1,6 +1,6 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.generic.crossbar import LiteEthCrossbar
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.generic.crossbar import LiteEthCrossbar
 
 class LiteEthIPV4MasterPort:
 	def __init__(self, dw):
diff --git a/misoclib/liteeth/core/tty/__init__.py b/misoclib/liteeth/core/tty/__init__.py
index a0102c4f..82bf5a0d 100644
--- a/misoclib/liteeth/core/tty/__init__.py
+++ b/misoclib/liteeth/core/tty/__init__.py
@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthTTYTX(Module):
 	def __init__(self, ip_address, udp_port, fifo_depth=None):
diff --git a/misoclib/liteeth/core/udp/__init__.py b/misoclib/liteeth/core/udp/__init__.py
index 1873d76f..1ff850fa 100644
--- a/misoclib/liteeth/core/udp/__init__.py
+++ b/misoclib/liteeth/core/udp/__init__.py
@@ -1,8 +1,8 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.core.udp.crossbar import *
-from liteeth.generic.depacketizer import LiteEthDepacketizer
-from liteeth.generic.packetizer import LiteEthPacketizer
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.core.udp.crossbar import *
+from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
+from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
 
 class LiteEthUDPPacketizer(LiteEthPacketizer):
 	def __init__(self):
diff --git a/misoclib/liteeth/core/udp/crossbar.py b/misoclib/liteeth/core/udp/crossbar.py
index 82843498..191fe43a 100644
--- a/misoclib/liteeth/core/udp/crossbar.py
+++ b/misoclib/liteeth/core/udp/crossbar.py
@@ -1,7 +1,7 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
-from liteeth.generic.crossbar import LiteEthCrossbar
+from misoclib.liteeth.generic.crossbar import LiteEthCrossbar
 
 class LiteEthUDPMasterPort:
 	def __init__(self, dw):
diff --git a/misoclib/liteeth/example_designs/make.py b/misoclib/liteeth/example_designs/make.py
index c55c8339..7c4bb9d7 100644
--- a/misoclib/liteeth/example_designs/make.py
+++ b/misoclib/liteeth/example_designs/make.py
@@ -10,7 +10,7 @@ from migen.bank.description import CSRStatus
 from mibuild import tools
 from mibuild.xilinx_common import *
 
-from liteeth.common import *
+from misoclib.liteeth.common import *
 
 def get_csr_csv(regions):
 	r = ""
diff --git a/misoclib/liteeth/example_designs/targets/base.py b/misoclib/liteeth/example_designs/targets/base.py
index 3fe1f2a4..6c6720d0 100644
--- a/misoclib/liteeth/example_designs/targets/base.py
+++ b/misoclib/liteeth/example_designs/targets/base.py
@@ -14,10 +14,10 @@ from litescope.bridge.uart2wb import LiteScopeUART2WB
 from litescope.frontend.la import LiteScopeLA
 from litescope.core.port import LiteScopeTerm
 
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.phy.gmii import LiteEthPHYGMII
-from liteeth.core import LiteEthUDPIPCore
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.phy.gmii import LiteEthPHYGMII
+from misoclib.liteeth.core import LiteEthUDPIPCore
 
 class _CRG(Module):
 	def __init__(self, platform):
diff --git a/misoclib/liteeth/example_designs/targets/etherbone.py b/misoclib/liteeth/example_designs/targets/etherbone.py
index 0aaaf2d2..74b1cbc5 100644
--- a/misoclib/liteeth/example_designs/targets/etherbone.py
+++ b/misoclib/liteeth/example_designs/targets/etherbone.py
@@ -2,11 +2,11 @@ from litescope.common import *
 from litescope.frontend.la import LiteScopeLA
 from litescope.core.port import LiteScopeTerm
 
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 from targets.base import BaseSoC
-from liteeth.core.etherbone import LiteEthEtherbone
+from misoclib.liteeth.core.etherbone import LiteEthEtherbone
 
 class EtherboneSoC(BaseSoC):
 	default_platform = "kc705"
diff --git a/misoclib/liteeth/example_designs/targets/tty.py b/misoclib/liteeth/example_designs/targets/tty.py
index 28cda9d8..43e33627 100644
--- a/misoclib/liteeth/example_designs/targets/tty.py
+++ b/misoclib/liteeth/example_designs/targets/tty.py
@@ -2,11 +2,11 @@ from litescope.common import *
 from litescope.frontend.la import LiteScopeLA
 from litescope.core.port import LiteScopeTerm
 
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 from targets.base import BaseSoC
-from liteeth.core.tty import LiteEthTTY
+from misoclib.liteeth.core.tty import LiteEthTTY
 
 class TTYSoC(BaseSoC):
 	default_platform = "kc705"
diff --git a/misoclib/liteeth/example_designs/targets/udp.py b/misoclib/liteeth/example_designs/targets/udp.py
index 9ce15ce5..ae297973 100644
--- a/misoclib/liteeth/example_designs/targets/udp.py
+++ b/misoclib/liteeth/example_designs/targets/udp.py
@@ -2,8 +2,8 @@ from litescope.common import *
 from litescope.frontend.la import LiteScopeLA
 from litescope.core.port import LiteScopeTerm
 
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 from targets.base import BaseSoC
 
diff --git a/misoclib/liteeth/example_designs/test/test_etherbone.py b/misoclib/liteeth/example_designs/test/test_etherbone.py
index 4622d524..444aca9f 100644
--- a/misoclib/liteeth/example_designs/test/test_etherbone.py
+++ b/misoclib/liteeth/example_designs/test/test_etherbone.py
@@ -1,5 +1,5 @@
 import socket, time
-from liteeth.test.model.etherbone import *
+from misoclib.liteeth.test.model.etherbone import *
 
 SRAM_BASE = 0x02000000
 
diff --git a/misoclib/liteeth/generic/__init__.py b/misoclib/liteeth/generic/__init__.py
index 643e9872..8de59192 100644
--- a/misoclib/liteeth/generic/__init__.py
+++ b/misoclib/liteeth/generic/__init__.py
@@ -1,4 +1,4 @@
-from liteeth.common import *
+from misoclib.liteeth.common import *
 
 # Generic classes
 class Port:
diff --git a/misoclib/liteeth/generic/crossbar.py b/misoclib/liteeth/generic/crossbar.py
index b60da949..0464d029 100644
--- a/misoclib/liteeth/generic/crossbar.py
+++ b/misoclib/liteeth/generic/crossbar.py
@@ -1,9 +1,9 @@
 from collections import OrderedDict
 
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.generic.arbiter import Arbiter
-from liteeth.generic.dispatcher import Dispatcher
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.generic.arbiter import Arbiter
+from misoclib.liteeth.generic.dispatcher import Dispatcher
 
 class LiteEthCrossbar(Module):
 	def __init__(self, master_port, dispatch_param):
diff --git a/misoclib/liteeth/generic/depacketizer.py b/misoclib/liteeth/generic/depacketizer.py
index 2d8ca86c..cb5a08d2 100644
--- a/misoclib/liteeth/generic/depacketizer.py
+++ b/misoclib/liteeth/generic/depacketizer.py
@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 def _decode_header(h_dict, h_signal, obj):
 	r = []
diff --git a/misoclib/liteeth/generic/packetizer.py b/misoclib/liteeth/generic/packetizer.py
index 418da814..f80a55c1 100644
--- a/misoclib/liteeth/generic/packetizer.py
+++ b/misoclib/liteeth/generic/packetizer.py
@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 def _encode_header(h_dict, h_signal, obj):
 	r = []
diff --git a/misoclib/liteeth/mac/__init__.py b/misoclib/liteeth/mac/__init__.py
index 1517b7bd..622c1842 100644
--- a/misoclib/liteeth/mac/__init__.py
+++ b/misoclib/liteeth/mac/__init__.py
@@ -1,8 +1,8 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.mac.common import *
-from liteeth.mac.core import LiteEthMACCore
-from liteeth.mac.frontend.wishbone import LiteEthMACWishboneInterface
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.mac.common import *
+from misoclib.liteeth.mac.core import LiteEthMACCore
+from misoclib.liteeth.mac.frontend.wishbone import LiteEthMACWishboneInterface
 
 class LiteEthMAC(Module, AutoCSR):
 	def __init__(self, phy, dw, interface="crossbar", endianness="big",
diff --git a/misoclib/liteeth/mac/common.py b/misoclib/liteeth/mac/common.py
index 3a68c632..cc0e8b20 100644
--- a/misoclib/liteeth/mac/common.py
+++ b/misoclib/liteeth/mac/common.py
@@ -1,8 +1,8 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.generic.depacketizer import LiteEthDepacketizer
-from liteeth.generic.packetizer import LiteEthPacketizer
-from liteeth.generic.crossbar import LiteEthCrossbar
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.generic.depacketizer import LiteEthDepacketizer
+from misoclib.liteeth.generic.packetizer import LiteEthPacketizer
+from misoclib.liteeth.generic.crossbar import LiteEthCrossbar
 
 class LiteEthMACDepacketizer(LiteEthDepacketizer):
 	def __init__(self):
diff --git a/misoclib/liteeth/mac/core/__init__.py b/misoclib/liteeth/mac/core/__init__.py
index 34a21ad1..d5ca2db0 100644
--- a/misoclib/liteeth/mac/core/__init__.py
+++ b/misoclib/liteeth/mac/core/__init__.py
@@ -1,6 +1,6 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.mac.core import gap, preamble, crc, padding, last_be
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.mac.core import gap, preamble, crc, padding, last_be
 
 class LiteEthMACCore(Module, AutoCSR):
 	def __init__(self, phy, dw, endianness="big", with_hw_preamble_crc=True):
diff --git a/misoclib/liteeth/mac/core/crc.py b/misoclib/liteeth/mac/core/crc.py
index 80321e4c..84d0c49f 100644
--- a/misoclib/liteeth/mac/core/crc.py
+++ b/misoclib/liteeth/mac/core/crc.py
@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthMACCRCEngine(Module):
 	"""Cyclic Redundancy Check Engine
diff --git a/misoclib/liteeth/mac/core/gap.py b/misoclib/liteeth/mac/core/gap.py
index 84f738aa..a1cfe5a4 100644
--- a/misoclib/liteeth/mac/core/gap.py
+++ b/misoclib/liteeth/mac/core/gap.py
@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthMACGap(Module):
 	def __init__(self, dw, ack_on_gap=False):
diff --git a/misoclib/liteeth/mac/core/last_be.py b/misoclib/liteeth/mac/core/last_be.py
index 2b67ad45..4ea1d215 100644
--- a/misoclib/liteeth/mac/core/last_be.py
+++ b/misoclib/liteeth/mac/core/last_be.py
@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthMACTXLastBE(Module):
 	def __init__(self, dw):
diff --git a/misoclib/liteeth/mac/core/padding.py b/misoclib/liteeth/mac/core/padding.py
index 12970fe4..8048f90b 100644
--- a/misoclib/liteeth/mac/core/padding.py
+++ b/misoclib/liteeth/mac/core/padding.py
@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthMACPaddingInserter(Module):
 	def __init__(self, dw, packet_min_length):
diff --git a/misoclib/liteeth/mac/core/preamble.py b/misoclib/liteeth/mac/core/preamble.py
index fd3cb975..283e4d53 100644
--- a/misoclib/liteeth/mac/core/preamble.py
+++ b/misoclib/liteeth/mac/core/preamble.py
@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthMACPreambleInserter(Module):
 	def __init__(self, dw):
diff --git a/misoclib/liteeth/mac/frontend/sram.py b/misoclib/liteeth/mac/frontend/sram.py
index cffe71b4..86d7710b 100644
--- a/misoclib/liteeth/mac/frontend/sram.py
+++ b/misoclib/liteeth/mac/frontend/sram.py
@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 from migen.bank.description import *
 from migen.bank.eventmanager import *
diff --git a/misoclib/liteeth/mac/frontend/wishbone.py b/misoclib/liteeth/mac/frontend/wishbone.py
index a68fe382..ec35918b 100644
--- a/misoclib/liteeth/mac/frontend/wishbone.py
+++ b/misoclib/liteeth/mac/frontend/wishbone.py
@@ -1,6 +1,6 @@
-from liteeth.common import *
-from liteeth.generic import *
-from liteeth.mac.frontend import sram
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
+from misoclib.liteeth.mac.frontend import sram
 
 from migen.bus import wishbone
 from migen.fhdl.simplify import FullMemoryWE
diff --git a/misoclib/liteeth/phy/gmii.py b/misoclib/liteeth/phy/gmii.py
index 180f7da5..dc16c261 100644
--- a/misoclib/liteeth/phy/gmii.py
+++ b/misoclib/liteeth/phy/gmii.py
@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthPHYGMIITX(Module):
 	def __init__(self, pads):
diff --git a/misoclib/liteeth/phy/loopback.py b/misoclib/liteeth/phy/loopback.py
index 89ffcb3a..51d4e56b 100644
--- a/misoclib/liteeth/phy/loopback.py
+++ b/misoclib/liteeth/phy/loopback.py
@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthPHYLoopbackCRG(Module, AutoCSR):
 	def __init__(self):
diff --git a/misoclib/liteeth/phy/mii.py b/misoclib/liteeth/phy/mii.py
index 0d3f61be..0a5ca660 100644
--- a/misoclib/liteeth/phy/mii.py
+++ b/misoclib/liteeth/phy/mii.py
@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthPHYMIITX(Module):
 	def __init__(self, pads):
diff --git a/misoclib/liteeth/phy/sim.py b/misoclib/liteeth/phy/sim.py
index f7069dd9..a2079a52 100644
--- a/misoclib/liteeth/phy/sim.py
+++ b/misoclib/liteeth/phy/sim.py
@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.generic import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.generic import *
 
 class LiteEthPHYSimCRG(Module, AutoCSR):
 	def __init__(self):
diff --git a/misoclib/liteeth/test/arp_tb.py b/misoclib/liteeth/test/arp_tb.py
index 3cd9ad36..2d2a1ee7 100644
--- a/misoclib/liteeth/test/arp_tb.py
+++ b/misoclib/liteeth/test/arp_tb.py
@@ -3,12 +3,12 @@ from migen.bus import wishbone
 from migen.bus.transactions import *
 from migen.sim.generic import run_simulation
 
-from liteeth.common import *
-from liteeth.mac import LiteEthMAC
-from liteeth.core.arp import LiteEthARP
+from misoclib.liteeth.common import *
+from misoclib.liteeth.mac import LiteEthMAC
+from misoclib.liteeth.core.arp import LiteEthARP
 
-from liteeth.test.common import *
-from liteeth.test.model import phy, mac, arp
+from misoclib.liteeth.test.common import *
+from misoclib.liteeth.test.model import phy, mac, arp
 
 ip_address = 0x12345678
 mac_address = 0x12345678abcd
diff --git a/misoclib/liteeth/test/common.py b/misoclib/liteeth/test/common.py
index d780565b..8b32855b 100644
--- a/misoclib/liteeth/test/common.py
+++ b/misoclib/liteeth/test/common.py
@@ -4,7 +4,7 @@ from migen.fhdl.std import *
 from migen.flow.actor import Sink, Source
 from migen.genlib.record import *
 
-from liteeth.common import *
+from misoclib.liteeth.common import *
 
 def print_with_prefix(s, prefix=""):
 	if not isinstance(s, str):
diff --git a/misoclib/liteeth/test/etherbone_tb.py b/misoclib/liteeth/test/etherbone_tb.py
index 275dc2e6..dbcda159 100644
--- a/misoclib/liteeth/test/etherbone_tb.py
+++ b/misoclib/liteeth/test/etherbone_tb.py
@@ -3,12 +3,12 @@ from migen.bus import wishbone
 from migen.bus.transactions import *
 from migen.sim.generic import run_simulation
 
-from liteeth.common import *
-from liteeth.core import LiteEthUDPIPCore
-from liteeth.core.etherbone import LiteEthEtherbone
+from misoclib.liteeth.common import *
+from misoclib.liteeth.core import LiteEthUDPIPCore
+from misoclib.liteeth.core.etherbone import LiteEthEtherbone
 
-from liteeth.test.common import *
-from liteeth.test.model import phy, mac, arp, ip, udp, etherbone
+from misoclib.liteeth.test.common import *
+from misoclib.liteeth.test.model import phy, mac, arp, ip, udp, etherbone
 
 ip_address = 0x12345678
 mac_address = 0x12345678abcd
diff --git a/misoclib/liteeth/test/icmp_tb.py b/misoclib/liteeth/test/icmp_tb.py
index f5e2d907..fd66fe64 100644
--- a/misoclib/liteeth/test/icmp_tb.py
+++ b/misoclib/liteeth/test/icmp_tb.py
@@ -3,15 +3,15 @@ from migen.bus import wishbone
 from migen.bus.transactions import *
 from migen.sim.generic import run_simulation
 
-from liteeth.common import *
-from liteeth.core import LiteEthIPCore
-
-from liteeth.test.common import *
-from liteeth.test.model.dumps import *
-from liteeth.test.model.mac import *
-from liteeth.test.model.ip import *
-from liteeth.test.model.icmp import *
-from liteeth.test.model import phy, mac, arp, ip, icmp
+from misoclib.liteeth.common import *
+from misoclib.liteeth.core import LiteEthIPCore
+
+from misoclib.liteeth.test.common import *
+from misoclib.liteeth.test.model.dumps import *
+from misoclib.liteeth.test.model.mac import *
+from misoclib.liteeth.test.model.ip import *
+from misoclib.liteeth.test.model.icmp import *
+from misoclib.liteeth.test.model import phy, mac, arp, ip, icmp
 
 ip_address = 0x12345678
 mac_address = 0x12345678abcd
diff --git a/misoclib/liteeth/test/ip_tb.py b/misoclib/liteeth/test/ip_tb.py
index 1c21ffa5..434f8857 100644
--- a/misoclib/liteeth/test/ip_tb.py
+++ b/misoclib/liteeth/test/ip_tb.py
@@ -3,11 +3,11 @@ from migen.bus import wishbone
 from migen.bus.transactions import *
 from migen.sim.generic import run_simulation
 
-from liteeth.common import *
-from liteeth.core import LiteEthIPCore
+from misoclib.liteeth.common import *
+from misoclib.liteeth.core import LiteEthIPCore
 
-from liteeth.test.common import *
-from liteeth.test.model import phy, mac, arp, ip
+from misoclib.liteeth.test.common import *
+from misoclib.liteeth.test.model import phy, mac, arp, ip
 
 ip_address = 0x12345678
 mac_address = 0x12345678abcd
diff --git a/misoclib/liteeth/test/mac_core_tb.py b/misoclib/liteeth/test/mac_core_tb.py
index 341028b7..3f48cf89 100644
--- a/misoclib/liteeth/test/mac_core_tb.py
+++ b/misoclib/liteeth/test/mac_core_tb.py
@@ -3,11 +3,11 @@ from migen.bus import wishbone
 from migen.bus.transactions import *
 from migen.sim.generic import run_simulation
 
-from liteeth.common import *
-from liteeth.mac.core import LiteEthMACCore
+from misoclib.liteeth.common import *
+from misoclib.liteeth.mac.core import LiteEthMACCore
 
-from liteeth.test.common import *
-from liteeth.test.model import phy, mac
+from misoclib.liteeth.test.common import *
+from misoclib.liteeth.test.model import phy, mac
 
 class TB(Module):
 	def __init__(self):
diff --git a/misoclib/liteeth/test/mac_wishbone_tb.py b/misoclib/liteeth/test/mac_wishbone_tb.py
index ca6740eb..4db3974b 100644
--- a/misoclib/liteeth/test/mac_wishbone_tb.py
+++ b/misoclib/liteeth/test/mac_wishbone_tb.py
@@ -3,11 +3,11 @@ from migen.bus import wishbone
 from migen.bus.transactions import *
 from migen.sim.generic import run_simulation
 
-from liteeth.common import *
-from liteeth.mac import LiteEthMAC
+from misoclib.liteeth.common import *
+from misoclib.liteeth.mac import LiteEthMAC
 
-from liteeth.test.common import *
-from liteeth.test.model import phy, mac
+from misoclib.liteeth.test.common import *
+from misoclib.liteeth.test.model import phy, mac
 
 class WishboneMaster:
 	def __init__(self, obj):
diff --git a/misoclib/liteeth/test/model/arp.py b/misoclib/liteeth/test/model/arp.py
index 677904cc..e6f3bfe6 100644
--- a/misoclib/liteeth/test/model/arp.py
+++ b/misoclib/liteeth/test/model/arp.py
@@ -1,9 +1,9 @@
 import math
 
-from liteeth.common import *
-from liteeth.test.common import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.test.common import *
 
-from liteeth.test.model import mac
+from misoclib.liteeth.test.model import mac
 
 def print_arp(s):
 	print_with_prefix(s, "[ARP]")
@@ -118,8 +118,8 @@ class ARP(Module):
 		request.target_ip = ip_address
 
 if __name__ == "__main__":
-	from liteeth.test.model.dumps import *
-	from liteeth.test.model.mac import *
+	from misoclib.liteeth.test.model.dumps import *
+	from misoclib.liteeth.test.model.mac import *
 	errors = 0
 	# ARP request
 	packet = MACPacket(arp_request)
diff --git a/misoclib/liteeth/test/model/etherbone.py b/misoclib/liteeth/test/model/etherbone.py
index 96cf49f7..96606e31 100644
--- a/misoclib/liteeth/test/model/etherbone.py
+++ b/misoclib/liteeth/test/model/etherbone.py
@@ -1,9 +1,9 @@
 import math, copy
 
-from liteeth.common import *
-from liteeth.test.common import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.test.common import *
 
-from liteeth.test.model import udp
+from misoclib.liteeth.test.model import udp
 
 def print_etherbone(s):
 	print_with_prefix(s, "[ETHERBONE]")
diff --git a/misoclib/liteeth/test/model/icmp.py b/misoclib/liteeth/test/model/icmp.py
index cf54b17c..2d4ff245 100644
--- a/misoclib/liteeth/test/model/icmp.py
+++ b/misoclib/liteeth/test/model/icmp.py
@@ -1,9 +1,9 @@
 import math
 
-from liteeth.common import *
-from liteeth.test.common import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.test.common import *
 
-from liteeth.test.model import ip
+from misoclib.liteeth.test.model import ip
 
 def print_icmp(s):
 	print_with_prefix(s, "[ICMP]")
@@ -79,9 +79,9 @@ class ICMP(Module):
 		pass
 
 if __name__ == "__main__":
-	from liteeth.test.model.dumps import *
-	from liteeth.test.model.mac import *
-	from liteeth.test.model.ip import *
+	from misoclib.liteeth.test.model.dumps import *
+	from misoclib.liteeth.test.model.mac import *
+	from misoclib.liteeth.test.model.ip import *
 	errors = 0
 	# ICMP packet
 	packet = MACPacket(ping_request)
diff --git a/misoclib/liteeth/test/model/ip.py b/misoclib/liteeth/test/model/ip.py
index 03c5f8b5..97ec33d0 100644
--- a/misoclib/liteeth/test/model/ip.py
+++ b/misoclib/liteeth/test/model/ip.py
@@ -1,9 +1,9 @@
 import math
 
-from liteeth.common import *
-from liteeth.test.common import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.test.common import *
 
-from liteeth.test.model import mac
+from misoclib.liteeth.test.model import mac
 
 def print_ip(s):
 	print_with_prefix(s, "[IP]")
@@ -124,8 +124,8 @@ class IP(Module):
 				self.icmp_callback(packet)
 
 if __name__ == "__main__":
-	from liteeth.test.model.dumps import *
-	from liteeth.test.model.mac import *
+	from misoclib.liteeth.test.model.dumps import *
+	from misoclib.liteeth.test.model.mac import *
 	errors = 0
 	# UDP packet
 	packet = MACPacket(udp)
diff --git a/misoclib/liteeth/test/model/mac.py b/misoclib/liteeth/test/model/mac.py
index 9267f88b..c4d6c905 100644
--- a/misoclib/liteeth/test/model/mac.py
+++ b/misoclib/liteeth/test/model/mac.py
@@ -1,7 +1,7 @@
 import math, binascii
 
-from liteeth.common import *
-from liteeth.test.common import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.test.common import *
 
 def print_mac(s):
 	print_with_prefix(s, "[MAC]")
@@ -127,7 +127,7 @@ class MAC(Module):
 				raise ValueError # XXX handle this properly
 
 if __name__ == "__main__":
-	from liteeth.test.model.dumps import *
+	from misoclib.liteeth.test.model.dumps import *
 	errors = 0
 	packet = MACPacket(arp_request)
 	packet.decode_remove_header()
diff --git a/misoclib/liteeth/test/model/phy.py b/misoclib/liteeth/test/model/phy.py
index 1401110f..14fd2e38 100644
--- a/misoclib/liteeth/test/model/phy.py
+++ b/misoclib/liteeth/test/model/phy.py
@@ -1,5 +1,5 @@
-from liteeth.common import *
-from liteeth.test.common import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.test.common import *
 
 def print_phy(s):
 	print_with_prefix(s, "[PHY]")
diff --git a/misoclib/liteeth/test/model/udp.py b/misoclib/liteeth/test/model/udp.py
index 20e0e6f2..32f1077b 100644
--- a/misoclib/liteeth/test/model/udp.py
+++ b/misoclib/liteeth/test/model/udp.py
@@ -1,9 +1,9 @@
 import math
 
-from liteeth.common import *
-from liteeth.test.common import *
+from misoclib.liteeth.common import *
+from misoclib.liteeth.test.common import *
 
-from liteeth.test.model import ip
+from misoclib.liteeth.test.model import ip
 
 def print_udp(s):
 	print_with_prefix(s, "[UDP]")
@@ -90,9 +90,9 @@ class UDP(Module):
 				self.etherbone_callback(packet)
 
 if __name__ == "__main__":
-	from liteeth.test.model.dumps import *
-	from liteeth.test.model.mac import *
-	from liteeth.test.model.ip import *
+	from misoclib.liteeth.test.model.dumps import *
+	from misoclib.liteeth.test.model.mac import *
+	from misoclib.liteeth.test.model.ip import *
 	errors = 0
 	# UDP packet
 	packet = MACPacket(udp)
diff --git a/misoclib/liteeth/test/udp_tb.py b/misoclib/liteeth/test/udp_tb.py
index 74811dc7..2f7ef9dd 100644
--- a/misoclib/liteeth/test/udp_tb.py
+++ b/misoclib/liteeth/test/udp_tb.py
@@ -3,11 +3,11 @@ from migen.bus import wishbone
 from migen.bus.transactions import *
 from migen.sim.generic import run_simulation
 
-from liteeth.common import *
-from liteeth.core import LiteEthUDPIPCore
+from misoclib.liteeth.common import *
+from misoclib.liteeth.core import LiteEthUDPIPCore
 
-from liteeth.test.common import *
-from liteeth.test.model import phy, mac, arp, ip, udp
+from misoclib.liteeth.test.common import *
+from misoclib.liteeth.test.model import phy, mac, arp, ip, udp
 
 ip_address = 0x12345678
 mac_address = 0x12345678abcd
diff --git a/targets/kc705.py b/targets/kc705.py
index 50b68804..4af947fc 100644
--- a/targets/kc705.py
+++ b/targets/kc705.py
@@ -5,9 +5,8 @@ from misoclib import sdram, spiflash
 from misoclib.sdram.phy import k7ddrphy
 from misoclib.gensoc import SDRAMSoC
 
-from extcores import *
-from liteeth.phy.gmii import LiteEthPHYGMII
-from liteeth.mac import LiteEthMAC
+from misoclib.liteeth.phy.gmii import LiteEthPHYGMII
+from misoclib.liteeth.mac import LiteEthMAC
 
 class _CRG(Module):
 	def __init__(self, platform):
diff --git a/targets/mlabs_video.py b/targets/mlabs_video.py
index 0738cd1a..c88e15c4 100644
--- a/targets/mlabs_video.py
+++ b/targets/mlabs_video.py
@@ -8,9 +8,8 @@ from misoclib import sdram, mxcrg, norflash16, framebuffer, gpio
 from misoclib.sdram.phy import s6ddrphy
 from misoclib.gensoc import SDRAMSoC
 
-from extcores import *
-from liteeth.phy.mii import LiteEthPHYMII
-from liteeth.mac import LiteEthMAC
+from misoclib.liteeth.phy.mii import LiteEthPHYMII
+from misoclib.liteeth.mac import LiteEthMAC
 
 class _MXClockPads:
 	def __init__(self, platform):