From: Eddie Hung <eddie@fpgeh.com>
Date: Sun, 28 Apr 2019 19:36:04 +0000 (-0700)
Subject: Move neg-pol to pos-pol mapping from ff_map to cells_map.v
X-Git-Tag: working-ls180~1237^2~138
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=009255d11d37beaeca95a59e5b484d44b39b980a;p=yosys.git

Move neg-pol to pos-pol mapping from ff_map to cells_map.v
---

diff --git a/techlibs/xilinx/cells_map.v b/techlibs/xilinx/cells_map.v
index 6b92d2ea9..8291f5647 100644
--- a/techlibs/xilinx/cells_map.v
+++ b/techlibs/xilinx/cells_map.v
@@ -18,6 +18,14 @@
  *
  */
 
+// Convert negative-polarity reset to positive-polarity
+module  \$_DFF_NN0_ (input D, C, R, output Q); \$_DFF_NP0_  _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule
+module  \$_DFF_PN0_ (input D, C, R, output Q); \$_DFF_PP0_  _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule
+
+module  \$_DFF_NN1_ (input D, C, R, output Q); \$_DFF_NP1   _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule
+module  \$_DFF_PN1_ (input D, C, R, output Q); \$_DFF_PP1   _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule
+
+
 module \$__SHREG_ (input C, input D, input E, output Q);
   parameter DEPTH = 0;
   parameter [DEPTH-1:0] INIT = 0;