From: Anton Blanchard Date: Tue, 15 Mar 2022 05:04:18 +0000 (+1100) Subject: xics: Fix warning when comparing two std_ulogic_vectors X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=00bf0af21c74a1727ed7786baa3f186ffd9d80d5;p=microwatt.git xics: Fix warning when comparing two std_ulogic_vectors Use unsigned() to make it clear what we are doing. Signed-off-by: Anton Blanchard --- diff --git a/xics.vhdl b/xics.vhdl index 6daa5d4..a717215 100644 --- a/xics.vhdl +++ b/xics.vhdl @@ -269,7 +269,7 @@ architecture rtl of xics_ics is begin masked := x"00"; masked(PRIO_BITS - 1 downto 0) := (others => '1'); - if pri8 >= masked then + if unsigned(pri8) >= unsigned(masked) then return pri_masked; else return pri8(PRIO_BITS-1 downto 0);