From: Eddie Hung <eddie@fpgeh.com>
Date: Sat, 23 Nov 2019 00:58:08 +0000 (-0800)
Subject: Replace TODO
X-Git-Tag: working-ls180~881^2^2~124^2~10
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=00d76f6cc4ccbf15b188570f0bf0dbd143ce3782;p=yosys.git

Replace TODO
---

diff --git a/passes/techmap/clkpart.cc b/passes/techmap/clkpart.cc
index bf3b5bd30..d8d53536d 100644
--- a/passes/techmap/clkpart.cc
+++ b/passes/techmap/clkpart.cc
@@ -58,7 +58,7 @@ struct ClkPartPass : public Pass {
 	}
 	void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
 	{
-		log_header(design, "Executing CLKPART pass (TODO).\n");
+		log_header(design, "Executing CLKPART pass (partition design according to clock domain).\n");
 		log_push();
 
 		clear_flags();