From: Samuel Pitoiset Date: Fri, 14 Jun 2019 13:17:06 +0000 (+0200) Subject: radv: set the DCC/FCE predicates from the base level X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=00f0e5c6fd075be9b7fa13b8ebc7b52a7fdbd035;p=mesa.git radv: set the DCC/FCE predicates from the base level Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen --- diff --git a/src/amd/vulkan/radv_meta_fast_clear.c b/src/amd/vulkan/radv_meta_fast_clear.c index 8fba2aa4b5c..eba0477c405 100644 --- a/src/amd/vulkan/radv_meta_fast_clear.c +++ b/src/amd/vulkan/radv_meta_fast_clear.c @@ -604,6 +604,7 @@ radv_emit_color_decompress(struct radv_cmd_buffer *cmd_buffer, if (radv_image_has_dcc(image)) { uint64_t pred_offset = decompress_dcc ? image->dcc_pred_offset : image->fce_pred_offset; + pred_offset += 8 * subresourceRange->baseMipLevel; old_predicating = cmd_buffer->state.predicating; @@ -695,6 +696,7 @@ radv_emit_color_decompress(struct radv_cmd_buffer *cmd_buffer, if (radv_image_has_dcc(image)) { uint64_t pred_offset = decompress_dcc ? image->dcc_pred_offset : image->fce_pred_offset; + pred_offset += 8 * subresourceRange->baseMipLevel; cmd_buffer->state.predicating = old_predicating;