From: Eddie Hung <eddie@fpgeh.com>
Date: Sat, 28 Dec 2019 10:15:11 +0000 (-0800)
Subject: Update resource count
X-Git-Tag: working-ls180~897^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=011f749ecfe37711552be7b9c7712931e82c3757;p=yosys.git

Update resource count
---

diff --git a/tests/arch/ecp5/mux.ys b/tests/arch/ecp5/mux.ys
index 92463aa32..22866832d 100644
--- a/tests/arch/ecp5/mux.ys
+++ b/tests/arch/ecp5/mux.ys
@@ -39,8 +39,8 @@ proc
 equiv_opt -assert -map +/ecp5/cells_sim.v synth_ecp5 # equivalency check
 design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
 cd mux16 # Constrain all select calls below inside the top module
-select -assert-count 8 t:L6MUX21
-select -assert-count 26 t:LUT4
-select -assert-count 12 t:PFUMX
+select -assert-count 12 t:L6MUX21
+select -assert-count 34 t:LUT4
+select -assert-count 17 t:PFUMX
 
 select -assert-none t:LUT4 t:L6MUX21 t:PFUMX %% t:* %D