From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 28 Sep 2020 11:22:02 +0000 (+0100)
Subject: rewrite ilang file after litex ls180 build
X-Git-Tag: 24jan2021_ls180~297
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0142d73509b787a35b0ea0effbc4c37c25c1b880;p=soc.git

rewrite ilang file after litex ls180 build
---

diff --git a/src/soc/litex/florent/Makefile b/src/soc/litex/florent/Makefile
index 48937c30..4c889500 100644
--- a/src/soc/litex/florent/Makefile
+++ b/src/soc/litex/florent/Makefile
@@ -3,7 +3,10 @@ ls180:
 	cp build/ls180/gateware/ls180.v .
 	cp build/ls180/gateware/mem.init .
 	cp libresoc/libresoc.v .
-	yosys -p 'read_verilog ls180.v; read_verilog libresoc.v; write_ilang ls180.il'
+	yosys -p 'read_verilog libresoc.v' \
+          -p 'write_ilang libresoc_cvt.il'
 	yosys -p 'read_verilog ls180.v' \
-          -p 'read_verilog libresoc.v' \
+          -p 'write_ilang ls180_cvt.il'
+	yosys -p 'read_ilang ls180_cvt.il' \
+          -p 'read_ilang libresoc_cvt.il' \
           -p 'write_ilang ls180.il'