From: Dmitry Selyutin <ghostmansd@gmail.com>
Date: Tue, 24 Jan 2023 18:47:09 +0000 (+0300)
Subject: power_enums: enable Rc-aware dsld/dsrd
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=014e8dd5b159028d46de04ad4f32720e07aa247c;p=openpower-isa.git

power_enums: enable Rc-aware dsld/dsrd
---

diff --git a/src/openpower/decoder/power_enums.py b/src/openpower/decoder/power_enums.py
index e18bceb0..b7f02783 100644
--- a/src/openpower/decoder/power_enums.py
+++ b/src/openpower/decoder/power_enums.py
@@ -711,7 +711,7 @@ _insns = [
     "divmod2du",
     "divw", "divwe", "divweo",
     "divweu", "divweuo", "divwo", "divwu", "divwuo",
-    "dsld", "dsrd",
+    "dsld", "dsld.", "dsrd", "dsrd.",
     "eieio", "eqv",
     "extsb", "extsh", "extsw", "extswsli",
     "fadd", "fadds", "fsub", "fsubs",                   # FP add / sub