From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 21 Jun 2018 10:21:22 +0000 (+0100)
Subject: update
X-Git-Tag: convert-csv-opcode-to-binary~5128
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=01562f282c046fc8857a113b07422caf11dc5ac4;p=libreriscv.git

update
---

diff --git a/pinmux/pinmux_chennai_2018.tex b/pinmux/pinmux_chennai_2018.tex
index b3578ee3b..0901b67fb 100644
--- a/pinmux/pinmux_chennai_2018.tex
+++ b/pinmux/pinmux_chennai_2018.tex
@@ -141,7 +141,7 @@
 \frame{\frametitle{Associated Extras}
 
  \begin{itemize}
-   \item Design Specification (what markets to target)
+   \item Design Specification ({\bf what} markets to target)
    \item Scenario analysis ({\bf whether} the chip will fit "markets")
    \item Documentation: Summary sheet, Technical Reference Manual.
    \item Test suites
@@ -190,21 +190,23 @@
 \frame{\frametitle{Reduce workload, reduce duplication, reduce risk and cost}
 
  \begin{itemize}
-   \item Auto-generate everything: documentation, code, libraries etc.
-	     \vspace{10pt}
+   \item Auto-generate everything: documentation, code, libraries etc.\\
+	     (including device-tree files, FreeBSD / Linux / RTOS kernel
+	     drivers, Arduino, libopencm3 and other EC firmware libraries)
+	     \vspace{4pt}
    \item Standardise: similar to PLIC, propose GPIO and Pinmux\\
 	     saves engineering effort, design effort and much more
-	     \vspace{10pt}
+	     \vspace{4pt}
    \item Standardise format of configuration registers:
 	     saves code duplication effort (multiple software environments)
-		 \vspace{10pt}
+		 \vspace{4pt}
    \item Add support for multiple code formats: Chisel3 (SiFive IOF),
 	     BSV (Bluespec), Verilog, VHDL, MyHDL.
-		 \vspace{10pt}
+		 \vspace{4pt}
    \item Multiple auto-generated code-formats permits cross-validation:\\
 	     auto-generated test suite in one HDL can validate a muxer
 	     generated for a different target HDL.
-   		 \vspace{10pt}
+   		 \vspace{4pt}
   \end{itemize}
 }