From: Tiago Mück Date: Fri, 22 Nov 2019 21:34:47 +0000 (-0600) Subject: mem-ruby: fixes for masked writes X-Git-Tag: develop-gem5-snapshot~92 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0183c584928e3740dc017e6d3b92c1e1e2e1a0ac;p=gem5.git mem-ruby: fixes for masked writes This adds DataBlock::setData(PacketPtr) to update the block with packet data. The method uses the packet's writeData to copy the correct bytes if the request is a masked write. Change-Id: I9e5f70fed29edcf55fef94a4b145aa838dc60eac Signed-off-by: Tiago Mück Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41134 Reviewed-by: Jason Lowe-Power Reviewed-by: Matthew Poremba Maintainer: Jason Lowe-Power Tested-by: kokoro --- diff --git a/src/mem/ruby/common/DataBlock.cc b/src/mem/ruby/common/DataBlock.cc index f58c16421..5ce9e52d7 100644 --- a/src/mem/ruby/common/DataBlock.cc +++ b/src/mem/ruby/common/DataBlock.cc @@ -1,4 +1,16 @@ /* + * Copyright (c) 2021 ARM Limited + * All rights reserved. + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood * All rights reserved. * @@ -108,6 +120,14 @@ DataBlock::setData(const uint8_t *data, int offset, int len) memcpy(&m_data[offset], data, len); } +void +DataBlock::setData(PacketPtr pkt) +{ + int offset = getOffset(pkt->getAddr()); + assert(offset + pkt->getSize() <= RubySystem::getBlockSizeBytes()); + pkt->writeData(&m_data[offset]); +} + DataBlock & DataBlock::operator=(const DataBlock & obj) { diff --git a/src/mem/ruby/common/DataBlock.hh b/src/mem/ruby/common/DataBlock.hh index d52b6fa72..0cb6cef52 100644 --- a/src/mem/ruby/common/DataBlock.hh +++ b/src/mem/ruby/common/DataBlock.hh @@ -1,4 +1,16 @@ /* + * Copyright (c) 2021 ARM Limited + * All rights reserved. + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * * Copyright (c) 1999-2008 Mark D. Hill and David A. Wood * All rights reserved. * @@ -35,6 +47,8 @@ #include #include +#include "mem/packet.hh" + class WriteMask; class DataBlock @@ -63,6 +77,7 @@ class DataBlock uint8_t *getDataMod(int offset); void setByte(int whichByte, uint8_t data); void setData(const uint8_t *data, int offset, int len); + void setData(PacketPtr pkt); void copyPartial(const DataBlock &dblk, int offset, int len); void copyPartial(const DataBlock &dblk, const WriteMask &mask); void atomicPartial(const DataBlock & dblk, const WriteMask & mask); diff --git a/src/mem/ruby/system/DMASequencer.cc b/src/mem/ruby/system/DMASequencer.cc index 538e2b442..2924a0205 100644 --- a/src/mem/ruby/system/DMASequencer.cc +++ b/src/mem/ruby/system/DMASequencer.cc @@ -1,4 +1,16 @@ /* + * Copyright (c) 2021 ARM Limited + * All rights reserved. + * + * The license below extends only to copyright in the software and shall + * not be construed as granting a license to any other intellectual + * property including but not limited to intellectual property relating + * to a hardware implementation of the functionality of the software + * licensed hereunder. You may use the software subject to the license + * terms below provided that you ensure that this notice is replicated + * unmodified and in its entirety in all distributions of the software, + * modified or unmodified, in source code or in binary form. + * * Copyright (c) 2008 Mark D. Hill and David A. Wood * All rights reserved. * @@ -70,6 +82,9 @@ DMASequencer::makeRequest(PacketPtr pkt) int len = pkt->getSize(); bool write = pkt->isWrite(); + // Should DMA be allowed to generate this ? + assert(!pkt->isMaskedWrite()); + assert(m_outstanding_count < m_max_outstanding_requests); Addr line_addr = makeLineAddress(paddr); auto emplace_pair = diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc index 2d51f8464..ab8367777 100644 --- a/src/mem/ruby/system/Sequencer.cc +++ b/src/mem/ruby/system/Sequencer.cc @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2020 ARM Limited + * Copyright (c) 2019-2021 ARM Limited * All rights reserved. * * The license below extends only to copyright in the software and shall @@ -575,8 +575,7 @@ Sequencer::hitCallback(SequencerRequest* srequest, DataBlock& data, // update the data unless it is a non-data-carrying flush if (RubySystem::getWarmupEnabled()) { - data.setData(pkt->getConstPtr(), - getOffset(request_address), pkt->getSize()); + data.setData(pkt); } else if (!pkt->isFlush()) { if ((type == RubyRequestType_LD) || (type == RubyRequestType_IFETCH) || @@ -587,6 +586,7 @@ Sequencer::hitCallback(SequencerRequest* srequest, DataBlock& data, data.getData(getOffset(request_address), pkt->getSize())); DPRINTF(RubySequencer, "read data %s\n", data); } else if (pkt->req->isSwap()) { + assert(!pkt->isMaskedWrite()); std::vector overwrite_val(pkt->getSize()); pkt->writeData(&overwrite_val[0]); pkt->setData( @@ -597,8 +597,7 @@ Sequencer::hitCallback(SequencerRequest* srequest, DataBlock& data, } else if (type != RubyRequestType_Store_Conditional || llscSuccess) { // Types of stores set the actual data here, apart from // failed Store Conditional requests - data.setData(pkt->getConstPtr(), - getOffset(request_address), pkt->getSize()); + data.setData(pkt); DPRINTF(RubySequencer, "set data %s\n", data); } }