From: Jim Wilson <wilson@gcc.gnu.org>
Date: Tue, 19 Dec 1995 02:14:50 +0000 (-0800)
Subject: (INITIALIZE_TRAMPOLINE): Likewise for cacheflush.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=01d7472931b081970fa6ca94d93b313306cf896d;p=gcc.git

(INITIALIZE_TRAMPOLINE): Likewise for cacheflush.

From-SVN: r10812
---

diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 83b10a2e486..a6a469f712f 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -2162,12 +2162,11 @@ typedef struct mips_args {
     }									    \
 									    \
   /* Flush the instruction cache.  */					    \
-  /* ??? Are the modes right? Maybe they should depend on -mint64/-mlong64? */\
   /* ??? Should check the return value for errors.  */			    \
   emit_library_call (gen_rtx (SYMBOL_REF, Pmode, "cacheflush"),		    \
 		     0, VOIDmode, 3, addr, Pmode,			    \
-		     GEN_INT (TRAMPOLINE_SIZE), SImode,  		    \
-		     GEN_INT (1), SImode);				    \
+		     GEN_INT (TRAMPOLINE_SIZE), TYPE_MODE (integer_type_node),\
+		     GEN_INT (1), TYPE_MODE (integer_type_node));	    \
 }
 
 /* Addressing modes, and classification of registers for them.  */