From: Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
Date: Mon, 19 Apr 2021 14:00:07 +0000 (+0100)
Subject: aarch64: New instructions for maintenance of GPT entries cached in a TLB
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=02202574ec8d0d7e2a90c41342cc22cc2173da28;p=binutils-gdb.git

aarch64: New instructions for maintenance of GPT entries cached in a TLB

This patch adds support to four new system registers (RPAOS, RPALOS, PAALLOS,
PAALL) in conjunction with TLBI instruction. This change is part of RME (Realm
Management Extension).

gas/ChangeLog:

2021-04-19  Przemyslaw Wirkus  <przemyslaw.wirkus@arm.com>

	* NEWS: Update news.
	* testsuite/gas/aarch64/rme.d: Update test.
	* testsuite/gas/aarch64/rme.s: Update test.

opcodes/ChangeLog:

2021-04-19  Przemyslaw Wirkus  <przemyslaw.wirkus@arm.com>

	* aarch64-opc.c: Add new registers (RPAOS, RPALOS, PAALLOS, PAALL) support for
	TLBI instruction.
---

diff --git a/gas/ChangeLog b/gas/ChangeLog
index da2f91f7a8c..a1bfcde9bd3 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2021-04-19  Przemyslaw Wirkus  <przemyslaw.wirkus@arm.com>
+
+	* NEWS: Update news.
+	* testsuite/gas/aarch64/rme.d: Update test.
+	* testsuite/gas/aarch64/rme.s: Update test.
+
 2021-04-19  Przemyslaw Wirkus  <przemyslaw.wirkus@arm.com>
 
 	* testsuite/gas/aarch64/rme.d: Update test.
diff --git a/gas/NEWS b/gas/NEWS
index 417f8b1f5a6..6944bdf3ba6 100644
--- a/gas/NEWS
+++ b/gas/NEWS
@@ -2,6 +2,8 @@
 
 * arm-symbianelf support removed.
 
+* Add support for Realm Management Extension (RME) for AArch64.
+
 Changes in 2.36:
 
 * Add support for Intel AVX VNNI instructions.
diff --git a/gas/testsuite/gas/aarch64/rme.d b/gas/testsuite/gas/aarch64/rme.d
index 89bedb85dba..a714b78c346 100644
--- a/gas/testsuite/gas/aarch64/rme.d
+++ b/gas/testsuite/gas/aarch64/rme.d
@@ -14,3 +14,7 @@ Disassembly of section \.text:
   10:	d51e2180 	msr	gptbr_el3, x0
   14:	d50e7e20 	dc	cipapa, x0
   18:	d50e7ea0 	dc	cigdpapa, x0
+  1c:	d50e8460 	tlbi	rpaos, x0
+  20:	d50e84e0 	tlbi	rpalos, x0
+  24:	d50e819f 	tlbi	paallos
+  28:	d50e879f 	tlbi	paall
diff --git a/gas/testsuite/gas/aarch64/rme.s b/gas/testsuite/gas/aarch64/rme.s
index b9a915df1d8..21d9bd2deeb 100644
--- a/gas/testsuite/gas/aarch64/rme.s
+++ b/gas/testsuite/gas/aarch64/rme.s
@@ -12,3 +12,9 @@ msr gptbr_el3, x0
 /* RME data cache maintenance operations.   */
 dc cipapa, x0
 dc cigdpapa, x0
+
+/* RME instructions for maintenance of GPT entries cached in a TLB.  */
+tlbi rpaos, x0
+tlbi rpalos, x0
+tlbi paallos
+tlbi paall
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 5bae9d06e69..477504870a7 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2021-04-19  Przemyslaw Wirkus  <przemyslaw.wirkus@arm.com>
+
+	* aarch64-opc.c: Add new registers (RPAOS, RPALOS, PAALLOS, PAALL) support
+	for TLBI instruction.
+
 2021-04-19  Przemyslaw Wirkus  <przemyslaw.wirkus@arm.com>
 
 	* aarch64-opc.c: Add new register (CIPAPA, CIGDPAPA) support for
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index b315a82b14e..dea4b8e6f1a 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -4870,6 +4870,11 @@ const aarch64_sys_ins_reg aarch64_sys_regs_tlbi[] =
     { "rvae3os",    CPENS (6, C8, C5, 1), F_HASXT | F_ARCHEXT },
     { "rvale3os",   CPENS (6, C8, C5, 5), F_HASXT | F_ARCHEXT },
 
+    { "rpaos",      CPENS (6, C8, C4, 3), F_HASXT },
+    { "rpalos",     CPENS (6, C8, C4, 7), F_HASXT },
+    { "paallos",    CPENS (6, C8, C1, 4), 0},
+    { "paall",      CPENS (6, C8, C7, 4), 0},
+
     { 0,       CPENS(0,0,0,0), 0 }
 };