From: Jakub Jelinek Date: Thu, 12 May 2016 08:34:38 +0000 (+0200) Subject: sse.md (sse2_loadld): Use v instead of x constraint in alternatives 0,1,4. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0247b635c78d12fbc335f7df19bf383ef50c7ba5;p=gcc.git sse.md (sse2_loadld): Use v instead of x constraint in alternatives 0,1,4. * config/i386/sse.md (sse2_loadld): Use v instead of x constraint in alternatives 0,1,4. From-SVN: r236166 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4dbae25dfe9..b22d3cf4f0b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,8 @@ 2016-05-12 Jakub Jelinek + * config/i386/sse.md (sse2_loadld): Use v instead of x + constraint in alternatives 0,1,4. + * config/i386/sse.md (pinsr_evex_isa): New mode attr. (_pinsr): Add 2 alternatives with v constraints instead of x and isa attribute. diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 82562baa98d..11df95584d4 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -13013,11 +13013,11 @@ "operands[2] = CONST0_RTX (V4SImode);") (define_insn "sse2_loadld" - [(set (match_operand:V4SI 0 "register_operand" "=x,Yi,x,x,x") + [(set (match_operand:V4SI 0 "register_operand" "=v,Yi,x,x,v") (vec_merge:V4SI (vec_duplicate:V4SI - (match_operand:SI 2 "nonimmediate_operand" "m ,r ,m,x,x")) - (match_operand:V4SI 1 "reg_or_0_operand" "C ,C ,C,0,x") + (match_operand:SI 2 "nonimmediate_operand" "m ,r ,m,x,v")) + (match_operand:V4SI 1 "reg_or_0_operand" "C ,C ,C,0,v") (const_int 1)))] "TARGET_SSE" "@ @@ -13028,7 +13028,7 @@ vmovss\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "sse2,sse2,noavx,noavx,avx") (set_attr "type" "ssemov") - (set_attr "prefix" "maybe_vex,maybe_vex,orig,orig,vex") + (set_attr "prefix" "maybe_vex,maybe_vex,orig,orig,maybe_evex") (set_attr "mode" "TI,TI,V4SF,SF,SF")]) ;; QI and HI modes handled by pextr patterns.