From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 22 Aug 2020 13:01:26 +0000 (+0100)
Subject: modsd bug, https://bugs.libre-soc.org/show_bug.cgi?id=471
X-Git-Tag: semi_working_ecp5~272^2~29
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0253c121ea0f61e503f9efe70a487279c4a38ab7;p=soc.git

modsd bug, https://bugs.libre-soc.org/show_bug.cgi?id=471
---

diff --git a/src/soc/fu/div/test/test_pipe_caller.py b/src/soc/fu/div/test/test_pipe_caller.py
index 34c54f37..def5c77f 100644
--- a/src/soc/fu/div/test/test_pipe_caller.py
+++ b/src/soc/fu/div/test/test_pipe_caller.py
@@ -12,6 +12,15 @@ from soc.fu.div.test.helper import (log_rand, get_cu_inputs,
 
 class DivTestCases(TestAccumulatorBase):
 
+    # modulo
+    def case_modsd_regression(self):
+        lst = [f"modsd 17, 27, 0"]
+        initial_regs = [0] * 32
+        initial_regs[0] = 0xff
+        initial_regs[27] = 0x7fffffffffffffff
+        with Program(lst, bigendian) as prog:
+            self.add_case(prog, initial_regs)
+
     def case_0_regression(self):
         for i in range(40):
             lst = ["divwo 3, 1, 2"]