From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 27 Mar 2023 10:58:29 +0000 (+0100)
Subject: whitespace (indentation)
X-Git-Tag: opf_rfc_ls001_v3~31
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0254019a6ad5294fec7a954ab1a18138a60355bb;p=libreriscv.git

whitespace (indentation)
---

diff --git a/openpower/sv/rfc/ls009.mdwn b/openpower/sv/rfc/ls009.mdwn
index 45c176e57..6ed3aa5ae 100644
--- a/openpower/sv/rfc/ls009.mdwn
+++ b/openpower/sv/rfc/ls009.mdwn
@@ -557,7 +557,9 @@ Pseudo-code:
 
 Special Registers Altered:
 
+```
     None
+```
 
 `svremap` determines the relationship between registers and SVSHAPE SPRs.
 The bitmask `SVme` determines which registers have a REMAP applied, and mi0-mo1
@@ -997,7 +999,9 @@ Form: SVM-Form SV "Matrix" Form (see [[isatables/fields.text]])
 
 Special Registers Altered:
 
+```
     None
+```
 
 `svshape` is a convenience instruction that reduces instruction
 count for common usage patterns, particularly Matrix, DCT and FFT. It sets up
@@ -1128,7 +1132,9 @@ Pseudo-code:
 
 Special Registers Altered:
 
+```
     None
+```
 
 `svindex` is a convenience instruction that reduces instruction
 count for Indexed REMAP Mode. It sets up