From: Dmitry Selyutin Date: Thu, 7 Sep 2023 19:05:51 +0000 (+0300) Subject: libsvp64: support operands flags X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=02791fc259f133bd9d59e7aabff08007ad1acd7a;p=openpower-isa.git libsvp64: support operands flags --- diff --git a/src/libsvp64/codegen.py b/src/libsvp64/codegen.py index ff80119d..0880742c 100644 --- a/src/libsvp64/codegen.py +++ b/src/libsvp64/codegen.py @@ -234,6 +234,7 @@ class DisGenSource(Source): self.emit("svp64_disassemble_operand(struct svp64_ctx *ctx, uint32_t insn, size_t id) {") with self: self.emit("uint32_t value;") + self.emit("uint32_t flags;") self.emit("") self.emit(f"switch (ctx->record->operands[id]) {{") yield node @@ -244,6 +245,7 @@ class DisGenSource(Source): self.emit("") with self: self.emit("ctx->operands[id].value = value;") + self.emit("ctx->operands[id].flags = flags;") self.emit("") self.emit("return SVP64_SUCCESS;") self.emit("}") @@ -277,6 +279,7 @@ class DisGenSource(Source): with self: yield from fetch(span) yield f");" + yield "flags = UINT32_C(0);" self.emit("break;") def signed_handler(span): @@ -295,6 +298,7 @@ class DisGenSource(Source): yield "-" yield f"{mask}" yield ");" + yield "flags = SVP64_OPERAND_SIGNED;" self.emit("break;") handlers = { diff --git a/src/libsvp64/svp64.h b/src/libsvp64/svp64.h index 5949e179..e2e5776d 100644 --- a/src/libsvp64/svp64.h +++ b/src/libsvp64/svp64.h @@ -29,8 +29,11 @@ struct svp64_record { struct svp64_operand { uint32_t value; + uint32_t flags; }; +#define SVP64_OPERAND_SIGNED (UINT32_C(1) << UINT32_C(0)) + struct svp64_ctx { struct svp64_record const *record; struct svp64_operand operands[8];