From: lkcl <lkcl@web>
Date: Sun, 13 Mar 2022 15:29:03 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~3070
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=02aabb826e19c328d615f82cb03803c61c82eeed;p=libreriscv.git

---

diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn
index c46d1ce95..d35c856ee 100644
--- a/openpower/sv/bitmanip.mdwn
+++ b/openpower/sv/bitmanip.mdwn
@@ -329,7 +329,9 @@ uint_xlen_t bmextrev(RA, RB, sh)
 # grevlut
 
 generalised reverse combined with a pair of LUT2s and allowing
-zero when RA=0 provides a wide range of instructions
+a constant `0b0101...0101` when RA=0, and an option to invert
+(including when RA=0, giving a constant 0b1010...1010 as the
+initial value) provides a wide range of instructions
 and a means to set regular 64 bit patterns in one
 32 bit instruction.