From: Rob Clark Date: Sun, 17 Jan 2016 17:21:45 +0000 (-0500) Subject: freedreno/ir3: fix mad 3rd src delay calc X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=02ac91d717036be0c8390b99860d37ff390c50e2;p=mesa.git freedreno/ir3: fix mad 3rd src delay calc In fad158a0 ("freedreno/ir3: array rework") the src # (n) shifted by one, but missed updating delay-slot calc. Signed-off-by: Rob Clark --- diff --git a/src/gallium/drivers/freedreno/ir3/ir3_depth.c b/src/gallium/drivers/freedreno/ir3/ir3_depth.c index 3354cbd23fa..6d294f1a48c 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_depth.c +++ b/src/gallium/drivers/freedreno/ir3/ir3_depth.c @@ -76,7 +76,7 @@ int ir3_delayslots(struct ir3_instruction *assigner, return 6; } else if ((consumer->category == 3) && (is_mad(consumer->opc) || is_madsh(consumer->opc)) && - (n == 2)) { + (n == 3)) { /* special case, 3rd src to cat3 not required on first cycle */ return 1; } else {