From: Luke Kenneth Casson Leighton Date: Mon, 13 May 2019 22:24:07 +0000 (+0100) Subject: comb on intpick X-Git-Tag: div_pipeline~2051 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=02b7caf6e25a5cf1008b10d2ac6c84faabdde9af;p=soc.git comb on intpick --- diff --git a/src/experiment/compalu.py b/src/experiment/compalu.py index 69dbff59..d9e0108d 100644 --- a/src/experiment/compalu.py +++ b/src/experiment/compalu.py @@ -33,7 +33,7 @@ class ComputationUnitNoDelay(Elaboratable): # is in effect a "3-way revolving door". At no time may all 3 # latches be set at the same time. - # opcode latch (not using go_rd_i) + # opcode latch (not using go_rd_i) - inverted so that busy resets to 0 m.d.comb += opc_l.s.eq(self.issue_i) # XXX NOTE: INVERTED FROM book! m.d.comb += opc_l.r.eq(self.go_wr_i) # XXX NOTE: INVERTED FROM book! diff --git a/src/experiment/score6600.py b/src/experiment/score6600.py index 0d334ec1..5415ae9e 100644 --- a/src/experiment/score6600.py +++ b/src/experiment/score6600.py @@ -256,8 +256,8 @@ class Scoreboard(Elaboratable): m.d.comb += intpick1.req_rel_i[0:2].eq(cu.req_rel_o[0:2]) int_readable_o = intfus.readable_o int_writable_o = intfus.writable_o - m.d.sync += intpick1.readable_i[0:2].eq(int_readable_o[0:2]) - m.d.sync += intpick1.writable_i[0:2].eq(int_writable_o[0:2]) + m.d.comb += intpick1.readable_i[0:2].eq(int_readable_o[0:2]) + m.d.comb += intpick1.writable_i[0:2].eq(int_writable_o[0:2]) #--------- # Connect Register File(s)