From: lkcl <lkcl@web>
Date: Sun, 24 Jan 2021 13:43:06 +0000 (+0000)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~352
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=02dc7cd2e2cde9ae768bfb507e6101282ca29584;p=libreriscv.git

---

diff --git a/openpower/sv/ldst.mdwn b/openpower/sv/ldst.mdwn
index 14fc02e16..20d5f45c0 100644
--- a/openpower/sv/ldst.mdwn
+++ b/openpower/sv/ldst.mdwn
@@ -315,10 +315,10 @@ permutations of vector selection, to identify above asm-syntax:
            (dest r# is scalar) -> VSELECT mode
      imm(RA)  RT.v   RA.s   fixed stride: unit or element
          sv.ld r#.v, ofst(r#2).v -> whole vector is at ofst+r#2
-           mem@r#   +0   +1   +2
+           mem@r#2  +0   +1   +2
            destreg  r#   r#+1 r#+2
          sv.ld/els r#.v, ofst(r#2).v -> vector at ofst*elidx+r#2
-           mem@r#   +0 ...   +offs ...  +offs*2
+           mem@r#2  +0 ...   +offs ...  +offs*2
            destreg  r#       r#+1       r#+2
      imm(RA)  RT.s   RA.s   not vectorised
          sv.ld r#, ofst(r#2)