From: Luke Kenneth Casson Leighton Date: Sun, 31 Jan 2021 15:08:29 +0000 (+0000) Subject: update submodule X-Git-Tag: convert-csv-opcode-to-binary~281 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=02eb7beb303c1e6c404a04053b70ccda25d9d286;p=soc.git update submodule --- diff --git a/libreriscv b/libreriscv index 30348c76..a89e605a 160000 --- a/libreriscv +++ b/libreriscv @@ -1 +1 @@ -Subproject commit 30348c765a545765ebe16121738730d17174f955 +Subproject commit a89e605aae22b1f7e26ddcb9577a8271d94d009e diff --git a/src/soc/decoder/power_enums.py b/src/soc/decoder/power_enums.py index 46e97d69..32bd638e 100644 --- a/src/soc/decoder/power_enums.py +++ b/src/soc/decoder/power_enums.py @@ -2,6 +2,14 @@ # Copyright (C) 2020, 2021 Luke Kenneth Casson Leighton # Copyright (C) 2020, Michael Nolan +"""Enums used in OpenPOWER ISA decoding + +Note: for SV, from v3.1B p12: + + The designated SPR sandbox consists of non-privileged SPRs 704-719 and + privileged SPRs 720-735. +""" + from enum import Enum, unique import csv import os