From: Sebastien Bourdeauducq Date: Sat, 23 Feb 2013 18:37:27 +0000 (+0100) Subject: corelogic -> genlib X-Git-Tag: 24jan2021_ls180~2099^2~443^2~65 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=0321513726cce7b2160257544983da7e1d48e741;p=litex.git corelogic -> genlib --- diff --git a/mibuild/generic_platform.py b/mibuild/generic_platform.py index aabd1a07..6777e765 100644 --- a/mibuild/generic_platform.py +++ b/mibuild/generic_platform.py @@ -2,7 +2,7 @@ from copy import copy import os, argparse from migen.fhdl.structure import * -from migen.corelogic.record import Record +from migen.genlib.record import Record from migen.fhdl import verilog from mibuild import tools