From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 27 Apr 2021 11:56:31 +0000 (+0000)
Subject: also add blackboxes spblock512* etc.
X-Git-Tag: LS180_RC3~81
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=039ba882cad069174275ed440e5e129c2e21b7bf;p=soclayout.git

also add blackboxes spblock512* etc.
---

diff --git a/experiments9/freepdk_c4m45/Makefile b/experiments9/freepdk_c4m45/Makefile
index 1a2db13..799c6f2 100755
--- a/experiments9/freepdk_c4m45/Makefile
+++ b/experiments9/freepdk_c4m45/Makefile
@@ -5,6 +5,11 @@
        PHYSICAL_SYNTHESIS = Coriolis
                DESIGN_KIT = FreePDK_C4M45
              YOSYS_FLATTEN = No
+         YOSYS_BLACKBOXES = pll \
+			    spblock512w64b8w_0 \
+			    spblock512w64b8w_1 \
+			    spblock512w64b8w_2 \
+			    spblock512w64b8w_3
 #            YOSYS_SET_TOP = Yes
                     CHIP  = chip
                     CORE  = ls180
@@ -46,3 +51,5 @@ cif:  	   chip_r.cif
 
 view:      cgt-chip_r
 sim:       asimut-ls180_r
+
+
diff --git a/experiments9/tsmc_c018/Makefile b/experiments9/tsmc_c018/Makefile
index 0713bdb..25d0b31 100755
--- a/experiments9/tsmc_c018/Makefile
+++ b/experiments9/tsmc_c018/Makefile
@@ -4,7 +4,11 @@
                DESIGN_KIT = FlexLib018
 #              DESIGN_KIT = cmos45
             YOSYS_FLATTEN = No
-	 YOSYS_BLACKBOXES = spblock_512w64b8w pll
+         YOSYS_BLACKBOXES = pll \
+			    spblock512w64b8w_0 \
+			    spblock512w64b8w_1 \
+			    spblock512w64b8w_2 \
+			    spblock512w64b8w_3
 #            YOSYS_SET_TOP = Yes
                     CHIP  = chip
                     CORE  = ls180
@@ -47,3 +51,7 @@ cif:  	   chip_r.cif
 
 view:      cgt-chip_r
 sim:       asimut-ls180_r
+
+
+
+