From: Benedikt Tutzer <benedikt.tutzer@tuwien.ac.at>
Date: Thu, 28 Mar 2019 11:16:39 +0000 (+0100)
Subject: Merge remote-tracking branch 'origin/master' into feature/python_bindings
X-Git-Tag: yosys-0.9~179^2~18
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=03d1606b42110f8eac7311ac57c7334d1f781273;p=yosys.git

Merge remote-tracking branch 'origin/master' into feature/python_bindings
---

03d1606b42110f8eac7311ac57c7334d1f781273
diff --cc Makefile
index de1e2c404,8586e9766..80b12c826
--- a/Makefile
+++ b/Makefile
@@@ -14,15 -16,11 +16,16 @@@ ENABLE_READLINE := 
  ENABLE_EDITLINE := 0
  ENABLE_VERIFIC := 0
  ENABLE_COVER := 1
 -ENABLE_LIBYOSYS := 0
 +ENABLE_LIBYOSYS := 1
  ENABLE_PROTOBUF := 0
  
 +# python wrappers
 +ENABLE_PYOSYS := 1
 +PYTHON_VERSION := 3.5
 +PYTHON_DESTDIR := /usr/local/lib/python$(PYTHON_VERSION)/dist-packages
 +
  # other configuration flags
+ ENABLE_GCOV := 0
  ENABLE_GPROF := 0
  ENABLE_DEBUG := 0
  ENABLE_NDEBUG := 0
diff --cc kernel/rtlil.cc
index 93b138071,b3214579d..efe2c3559
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@@ -663,19 -639,13 +665,24 @@@ RTLIL::Module::~Module(
  		delete it->second;
  	for (auto it = processes.begin(); it != processes.end(); ++it)
  		delete it->second;
 +#ifdef WITH_PYTHON
 +	RTLIL::Module::get_all_modules()->erase(hashidx_);
 +#endif
 +}
 +
 +#ifdef WITH_PYTHON
 +static std::map<unsigned int, RTLIL::Module*> *all_modules = new std::map<unsigned int, RTLIL::Module*>();
 +std::map<unsigned int, RTLIL::Module*> *RTLIL::Module::get_all_modules(void)
 +{
 +	return all_modules;
  }
 +#endif
  
+ void RTLIL::Module::reprocess_module(RTLIL::Design *, dict<RTLIL::IdString, RTLIL::Module *>)
+ {
+ 	log_error("Cannot reprocess_module module `%s' !\n", id2cstr(name));
+ }
+ 
  RTLIL::IdString RTLIL::Module::derive(RTLIL::Design*, dict<RTLIL::IdString, RTLIL::Const>, bool mayfail)
  {
  	if (mayfail)