From: Dmitry Selyutin <ghostmansd@gmail.com>
Date: Sun, 18 Sep 2022 09:07:17 +0000 (+0300)
Subject: power_insn: support svm specifier
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=03d6fa351062873348c9b8c7a066cbb79468a1a0;p=openpower-isa.git

power_insn: support svm specifier
---

diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py
index ca68f9fc..e258bb1f 100644
--- a/src/openpower/decoder/power_insn.py
+++ b/src/openpower/decoder/power_insn.py
@@ -1349,6 +1349,13 @@ class NormalSubvectorReduceRM(NormalBaseRM):
     """normal: subvector reduce mode, SUBVL>1"""
     SVM: BaseRM.mode[3]
 
+    @property
+    def specifiers(self):
+        if self.SVM:
+            yield "svm"
+
+        yield from super().specifiers
+
 
 class NormalReservedRM(NormalBaseRM):
     """normal: reserved"""
@@ -1645,6 +1652,9 @@ class CROpSubvectorReduceRM(CROpBaseRM):
     def specifiers(self):
         if self.zz:
             yield f"zz"
+        if self.SVM:
+            yield "svm"
+
         yield from super().specifiers