From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 4 Nov 2020 19:10:28 +0000 (+0000)
Subject: move back to 3.3v on X3 VERSA ECP5 connector
X-Git-Tag: 24jan2021_ls180~114
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=03e3f5513452aeb0cdf6c72702c3c66424af5af7;p=soc.git

move back to 3.3v on X3 VERSA ECP5 connector
---

diff --git a/src/soc/litex/florent/versa_ecp5.py b/src/soc/litex/florent/versa_ecp5.py
index 464e9412..487c96bd 100755
--- a/src/soc/litex/florent/versa_ecp5.py
+++ b/src/soc/litex/florent/versa_ecp5.py
@@ -43,10 +43,10 @@ class VersaECP5TestSoC(versa_ecp5.BaseSoC):
         # define the pins, add as an extension, *then* request it
         jtag_ios = [
             ("jtag", 0,
-                Subsignal("tdi", Pins("B19"), IOStandard("LVCMOS25")),
-                Subsignal("tms", Pins("B12"), IOStandard("LVCMOS25")),
-                Subsignal("tck", Pins("B9"), IOStandard("LVCMOS25")),
-                Subsignal("tdo", Pins("E6"), IOStandard("LVCMOS25")),
+                Subsignal("tdi", Pins("B19"), IOStandard("LVCMOS33")),
+                Subsignal("tms", Pins("B12"), IOStandard("LVCMOS33")),
+                Subsignal("tck", Pins("B9"), IOStandard("LVCMOS33")),
+                Subsignal("tdo", Pins("E6"), IOStandard("LVCMOS33")),
             )
         ]
         self.platform.add_extension(jtag_ios)