From: Marcin Ślusarz <marcin.slusarz@intel.com>
Date: Thu, 9 Jul 2020 18:54:41 +0000 (+0200)
Subject: intel/perf: fix how pipeline stats are stored
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=03e8b3551cf52b6b8b8efb48af7f413ddc4116b1;p=mesa.git

intel/perf: fix how pipeline stats are stored

It matters only when counters are not ordered by offset.

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5788>
---

diff --git a/src/intel/perf/gen_perf_query.c b/src/intel/perf/gen_perf_query.c
index 755ec9a83dd..3d4f922b2b3 100644
--- a/src/intel/perf/gen_perf_query.c
+++ b/src/intel/perf/gen_perf_query.c
@@ -625,7 +625,7 @@ snapshot_statistics_registers(struct gen_perf_context *ctx,
 
       perf->vtbl.store_register_mem(ctx->ctx, obj->pipeline_stats.bo,
                                     counter->pipeline_stat.reg, 8,
-                                    offset_in_bytes + i * sizeof(uint64_t));
+                                    offset_in_bytes + counter->offset);
    }
 }