From: Clifford Wolf <clifford@clifford.at>
Date: Fri, 3 Jan 2014 16:50:39 +0000 (+0100)
Subject: Cleanups in freduce command
X-Git-Tag: yosys-0.2.0~183
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=03f0ab9de29aa3e396c1b1b3e62e6676de3946a3;p=yosys.git

Cleanups in freduce command
---

diff --git a/passes/sat/freduce.cc b/passes/sat/freduce.cc
index 893fe5167..23ab8a04a 100644
--- a/passes/sat/freduce.cc
+++ b/passes/sat/freduce.cc
@@ -441,8 +441,6 @@ struct FreduceWorker
 
 		int bits_count = 0;
 		std::map<std::vector<RTLIL::SigBit>, std::vector<RTLIL::SigBit>> buckets;
-		buckets[std::vector<RTLIL::SigBit>()].push_back(RTLIL::SigBit(RTLIL::State::S0));
-		buckets[std::vector<RTLIL::SigBit>()].push_back(RTLIL::SigBit(RTLIL::State::S1));
 		for (auto &batch : batches)
 		{
 			for (auto &bit : batch)
@@ -464,6 +462,11 @@ struct FreduceWorker
 		}
 		log("  Sorted %d signal bits into %d buckets.\n", bits_count, int(buckets.size()));
 
+		if (buckets.count(std::vector<RTLIL::SigBit>()) != 0) {
+			buckets[std::vector<RTLIL::SigBit>()].push_back(RTLIL::SigBit(RTLIL::State::S0));
+			buckets[std::vector<RTLIL::SigBit>()].push_back(RTLIL::SigBit(RTLIL::State::S1));
+		}
+
 		std::vector<std::vector<equiv_bit_t>> equiv;
 		for (auto &bucket : buckets)
 		{